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I am designing my own 65W PD power bank,But I dont know how to deal with FB pin
In power bank application, VBUS is not a constant voltage.
when a change in VBUS voltage is need, if FB pin will source or sink a proportional current ?
EZ-PD™ CCG3PA Datasheet just write “Voltage regulation feedback pin” ,I want more description about FB pin,who can teach me how to do?
Solved! Go to Solution.
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Hi,
The CSA (Current sense amplifier) senses voltage on the low side of the VBUS path, referenced to ground. This voltage will be used for providing feedback to FB pin through the Low side current sense amplifier (LSCSA) during direct charging application. In this application, the analog output, is compared to a reference, Vref. The difference is amplified by an error amplifier. This output is translated to a current that manipulates the FB node to change the voltage on VBUS.
The current drawn through the CATH path is proportional to the potential difference between FB pin and the internal bandgap reference voltage. If VBUS needs to be changed from default 5 V, using internal IDACs and an error amplifier, CCG3PA draws a proportional current through the CATH pin. This in turn gets coupled to the primary controller through the opto-coupler.
I hope this explanation would help you in designing your PD Power bank.
Please revert back if you face any further issues.
Regards,
Abhilash P
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Hi,
The CSA (Current sense amplifier) senses voltage on the low side of the VBUS path, referenced to ground. This voltage will be used for providing feedback to FB pin through the Low side current sense amplifier (LSCSA) during direct charging application. In this application, the analog output, is compared to a reference, Vref. The difference is amplified by an error amplifier. This output is translated to a current that manipulates the FB node to change the voltage on VBUS.
The current drawn through the CATH path is proportional to the potential difference between FB pin and the internal bandgap reference voltage. If VBUS needs to be changed from default 5 V, using internal IDACs and an error amplifier, CCG3PA draws a proportional current through the CATH pin. This in turn gets coupled to the primary controller through the opto-coupler.
I hope this explanation would help you in designing your PD Power bank.
Please revert back if you face any further issues.
Regards,
Abhilash P