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Hello,
I am checking the circuite described in CCG3 datasheet.
Compairing Figure 2 and Figure 15, there are two MOSFETs connecting to VBUS_P_CTRL but the diection is different.
In Figure 2, DC-DC <-> Source-Gate-Drain <-> Drain-Gate-Source.
In Figure 15, DC-DC <-> Drain-Gate-Source <-> Source-Gate-Drain.
Which flow is correct or recommend?
Best regards,
Solved! Go to Solution.
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Q1) Why do you recommend the order, D-G-S, S-G-D?
>> If I recommend to use S-G-D, D-G-S. there are two cases and fake (The current will streaming through body-diode) one of N MOS FET in this case:
The current from left to right, the first N MOS FET is fake.
The current from right to left, the second N MOS FET is fake.
Q2) Why do we need 2 MOSFET on the line?
>> If there is only one MOS FET, you will lose above explain for both direction. This is the risk. We only design with best practice.
Q3) The current on N-MOS flows Drain to Sorce because gate voltage should be higher than source voltage.
Why 2nd MOFET conneting to VBUS_P_CTRL1 is sorce is connected to DCDC?
>> Please kindly notice that all of VBUS_P_CTRL1/2 of CCG3 is connected to CCG3.
Best Regards,
Lisa
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Hi ,
We are recommend to DC-DC <-> Drain-Gate-Source <-> Source-Gate-Drain.
Below circuits for your reference.
Best Regards,
Lisa
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Hello Lisa-san,
Thank you for your prompt response.
I think the following is general inquire but please let me know the reson.
Q1) Why do you recommend the order, D-G-S, S-G-D?
Q2) Why do we need 2 MOSFET on the line?
Q3) The current on N-MOS flows Drain to Sorce because gate voltage should be higher than source voltage.
Why 2nd MOFET conneting to VBUS_P_CTRL1 is sorce is connected to DCDC?
Best regards,
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Q1) Why do you recommend the order, D-G-S, S-G-D?
>> If I recommend to use S-G-D, D-G-S. there are two cases and fake (The current will streaming through body-diode) one of N MOS FET in this case:
The current from left to right, the first N MOS FET is fake.
The current from right to left, the second N MOS FET is fake.
Q2) Why do we need 2 MOSFET on the line?
>> If there is only one MOS FET, you will lose above explain for both direction. This is the risk. We only design with best practice.
Q3) The current on N-MOS flows Drain to Sorce because gate voltage should be higher than source voltage.
Why 2nd MOFET conneting to VBUS_P_CTRL1 is sorce is connected to DCDC?
>> Please kindly notice that all of VBUS_P_CTRL1/2 of CCG3 is connected to CCG3.
Best Regards,
Lisa