- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I have a UFP (sink) design that uses the CCG6 (CYPD6125) that connects to a LCD and to a HX3 (USB 2&3) hub. I need to configure the CCG6 to connect in type-c DisplayPort alt mode. This should be pin assignment D (2 lane DisplayPort and 2 for USB superspeed). I have the board getting PD power just find but the PD contract stalls before it can enter into the DisplayPort alt mode. I'm pretty sure I don't have the config correct.
For testing I'm connected to the CCG3 development board.
Solved! Go to Solution.
- Tags:
- displayport
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I'm getting a NAK now. The trick was setting the SVID to C0045 AND creating a base alternate mode for the SVID and setting it's value to FF01.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
Yes, your understanding is correct since CCG6 is not responding with the correct pin assignment in the Discover Modes VDM response. Please set the mode value to 0x80005 (plug design) or 0x80045 (receptacle design) in the configuration as shown in the image below.
Please refer to the DisplayPort specification for more details on the Display Modes response VDO format.
Best Regards,
Sananya
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I have updated the file and the PD alt mode contract has gotten further but the device is giving a NAK when upstream is trying to enter alt mode.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
Could you please provide the complete traces for me to check which mode the DFP enter mode command corresponds to? Please check if CCG3 (if that is the DFP used) is configured to support Pin assignment D. Please also ensure that the UFP_ALT_MODE_SUPP, DP_UFP_SUPP macros are enabled in config.h file in the CCG6 firmware.
Best Regards,
Sananya
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Find attached the complete trace (DM, C5, Macbook). The setup appears to work fine with a TUSB1064RNQEVM dev board. I have attached it's trace and a picture of the setup (TUSB1064EVM, Macbook).
The firmware appears to be setup correctly.
thanks
Heath
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Heath,
Could you please try after changing the mode value in the CCG6 configuration to "0xC0045" same as that of the TUSB1064EVM PD controller? As per the Display Port specification response, my understanding is that both need to be enabled even if only 2-lane DP signaling is supported since USB signaling is also used.
Best Regards,
Sananya
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I'm getting a NAK now. The trick was setting the SVID to C0045 AND creating a base alternate mode for the SVID and setting it's value to FF01.