CCG3PA cold boot / VBUS_P_CTRL default state

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DaEr_349131
Level 5
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25 likes received 50 sign-ins 5 comments on KBA

Planning to use CCG3PA for a power-sink (consumer role) only.
The board has no other power-sources nor batteries at the time of an type-c ac/dc being plugged in.

1.)
Can't find anything in the official CCG3PA datasheet that states what VBUS_P_CTRL's default state is.
Since the regulator for the CCG's VDDD rail will be post the 'consumer fet', it would be great with some input if this cold-booting ("dead battery") state is supported. 

2.)
Let's assume we would have a local power-source, so that VDDD would already be powered with a 3.3V rail.
Are there more details available on how to handle the fact that VDDD is also an output/regulator coming from the CCG3PA once it sees VBUS. I can see a diode in the block-level schematic in the datasheet but some more details would be great.

 

Thanks 

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1 Solution
Abhilash_P
Moderator
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50 likes received 500 replies posted 250 solutions authored

Hi,

1) The VDDD is internally regulated to 2.7V to 5.5V. This is made possible by sinking current through VBS_IN_DISCHARGE pin and using internal regulators. Please refer to the Power systems overview part of CCG3PA datasheet. The path for VBUS_IN_DISCHARGE is before the consume FETs.

Just an additional information: If you are using CCG3PA only for sink application then I recommend you to go for EZ-PD BCR controller . More about the controller can be found here

2) The KBA explains the following,  

      If VDDD has externally powered source, then the internal VBUS regulator has to be disabled. The firmware doesn't work properly if VDDD receives power from both the sources. The API reference is also mentioned in the KBA. 

 

Regards,

Abhilash P

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6 Replies
Abhilash_P
Moderator
Moderator
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50 likes received 500 replies posted 250 solutions authored

Hi,

1) Can you please confirm if you are using CYPD3171 as the target chip for your application. If yes, then can you please share the circuit of your application. VBUS_IN_DISCHARGE pin connection is before consumer FET. During the dead battery condition, CC pins have Rd termination. Hence upon connecting the type C Cable, the DFP sees this Rd termination and provides 5V on the Vbus line. This is used for internal chip operation and later the required voltage is negotiated and consumer FET is turned ON. Please let me know if this explanation has answered your question.

2) Please refer to the KBA231211 .

 

Regards,

Abhilash P

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DaEr_349131
Level 5
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25 likes received 50 sign-ins 5 comments on KBA

Hi Abhilash, please see attached schematic.

1) CYPD3171, yes. So the consumer FET is OFF default. This means our buck to provide 3.3V VDDD to the CCG3PA will not be there. OK?

2) I've read the KB article above a few times but can't wrap my head around what it says.. 🙂 
We need to support either VBUS power or local power in any order. This scenario isn't covered in the KB article

3) please review schematic and comment if any mistakes

 

power-scheme.jpg

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Abhilash_P
Moderator
Moderator
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50 likes received 500 replies posted 250 solutions authored

Hi,

1) The VDDD is internally regulated to 2.7V to 5.5V. This is made possible by sinking current through VBS_IN_DISCHARGE pin and using internal regulators. Please refer to the Power systems overview part of CCG3PA datasheet. The path for VBUS_IN_DISCHARGE is before the consume FETs.

Just an additional information: If you are using CCG3PA only for sink application then I recommend you to go for EZ-PD BCR controller . More about the controller can be found here

2) The KBA explains the following,  

      If VDDD has externally powered source, then the internal VBUS regulator has to be disabled. The firmware doesn't work properly if VDDD receives power from both the sources. The API reference is also mentioned in the KBA. 

 

Regards,

Abhilash P

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ps. about EZ-PD BCR (CYPD3177-24LQXQ), it's a nice part, but found a few limitations (please correct me if wrong)

- it doesn't seem possible to fetch the available PDO's via the i2c host interface
- no current sensing
- no PPS support
- zero stock globally

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DaEr_349131
Level 5
Level 5
25 likes received 50 sign-ins 5 comments on KBA

HI Abhilash,

1 & 2 is clear, but regarding item 2, we still have to support both use-cases. So please help comment on the following:

2.1) is there a built-in auto-sense feature to auto switch from VBUS_* to external supply? 
if not, what would be your proposed workaround to support a dual power-input design!?

 

3) please help connect me with someone that can review the schematic implementaion

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Abhilash_P
Moderator
Moderator
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50 likes received 500 replies posted 250 solutions authored

Hi,

2.1) The following sentence is from the mentioned KBA,

"CCG3PA firmware will not work normally when both the externally powered VDDD and internal VBUS regulator are enabled. The CCG3PA internal VBUS regulator is enabled by default. The pd_hal_disable_vreg(uint8_t port) API is defined in the pdss_mx_hal.c file for disabling CCG3PA internal VBUS regulator if it is called."

3) I will get the circuit schematics reviewed internally and update you.

 

Regards,

Abhilash P

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