Traveo

[MINA_4182041]

S6J34xx的MemoryMap设计了TCRAM和System RAM区域。

在使用过程中发现如果把数据段配置到TCRAM区域时，DMA不能从TCRAM读取数据来传输（通过DMA向TCRAM写入没有测试过），

DMA会产生“Source access error”，而把数据段配置到System RAM区域就没有问题。

请问

1.这款芯片设计TCRAM主要的应用场景是什么？

2.DMA为什么不能TCRAM? 是因为访问TCRAM需要使用TCRAM Interface?

[HongyanW_86 · Accepted solution]

TCRAM: TCRAM is connected to ARM-Cortex R5F core BTCM port via TCM-64 interface, which can be accessed by CPU (ARM-Cortex R5F core) directly (TCRAM area: 0x000_0000 ~). Other masters like DMA can only access TCRAM via AXI interface (AXI_SLAVE_CORE0 area: 0x0400_0000 ~). Using TCRAM would be FASTER.

SYSRAM: AXI-64 interface.

So DMA cannot access TCRAM area directly and result in the area. You can use AXI_SLAVE_CORE0 area if TCRAM is required (eg. ram_address + 0x04000000).

Kindly refer to S6J3400 Hardware Manual Platform part for more details.

https://www.cypress.com/documentation/technical-reference-manuals/traveo-family-hardware-manual-plat...

Best regards,

Amy