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Traveo

RoCo_4660301
New Contributor

I'm currently working with a s6j32hel board, but since IAR (v 8.50) doesn't have that device i configured it with s6j32gel.

When a click 'Download and debug' it gives me the following warnings, how can this be fix?

Debug Log:

Mon Apr 06, 2020 11:19:39: IAR Embedded Workbench 8.50.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll)

Mon Apr 06, 2020 11:19:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\Cypress\S6J3200.dmac

Mon Apr 06, 2020 11:19:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\Cypress\TRAVEO_DEBUG.dmac

Mon Apr 06, 2020 11:19:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.mac

Mon Apr 06, 2020 11:19:39: Loading the I-jet driver

Mon Apr 06, 2020 11:19:39: Probe: Probe SW module ver 1.65

Mon Apr 06, 2020 11:19:39: Probe: Option: trace(Auto,size_limit=25%)

Mon Apr 06, 2020 11:19:39: Probe: Found I-jet, SN=88726

Mon Apr 06, 2020 11:19:39: Probe: Opened connection to I-jet:88726

Mon Apr 06, 2020 11:19:39: Probe: USB connection verified (11538 packets/sec)

Mon Apr 06, 2020 11:19:39: Probe: I-jet, FW ver 7.2, HW Ver:B

Mon Apr 06, 2020 11:19:39: Probe: IJET-ARM20 adapter detected

Mon Apr 06, 2020 11:19:39: Probe: Versions: JTAG=1.85 SWO=1.40 A2D=1.73 Stream=1.50 SigCom=2.44

Mon Apr 06, 2020 11:19:39: Emulation layer version 4.61

Mon Apr 06, 2020 11:19:39: JTAG clock detected: 12MHz

Mon Apr 06, 2020 11:19:39: JTAG chain "TDI->TAP#1[IR=5]->TAP#0[Cortex:IR=4]->TDO" verified.

Mon Apr 06, 2020 11:19:39: Notification to init-after-power-up hookup.

Mon Apr 06, 2020 11:19:39: Notification to core-connect hookup.

Mon Apr 06, 2020 11:19:39: Connected DAP on JTAG. Detected DP ID=0x0.

Mon Apr 06, 2020 11:19:39: Connecting to TAP#0 DAP APB-AP port 1 (IDR=0x24770002) to core Cortex-R5 r1p3 at 0x80090000.

Mon Apr 06, 2020 11:19:39: Debug authentication:

Mon Apr 06, 2020 11:19:39:   Non-secure invasive debug not implemented

Mon Apr 06, 2020 11:19:39:   Non-secure non-invasive debug not implemented

Mon Apr 06, 2020 11:19:39:   Secure invasive debug enabled

Mon Apr 06, 2020 11:19:39:   Secure non-invasive debug enabled

Mon Apr 06, 2020 11:19:39: Debug resources: 8 H/W breakpoints, 8 watchpoints, 1 context ID breakpoints.

Mon Apr 06, 2020 11:19:39: CPU status OK

Mon Apr 06, 2020 11:19:39: LowLevelReset(script, delay 200)

Mon Apr 06, 2020 11:19:39: Calling reset script: ResetAndStopAtEndOfBootROM

Mon Apr 06, 2020 11:19:39: ----- Prepare hardware for flashloader -----

Mon Apr 06, 2020 11:19:39: Disabling Caches...

Mon Apr 06, 2020 11:19:39: Configuring and initializing TCRAM (128KB)...

Mon Apr 06, 2020 11:19:39: Initializing System RAM (384KB)...

Mon Apr 06, 2020 11:19:40: Clear WDT

Mon Apr 06, 2020 11:19:40: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.out

Mon Apr 06, 2020 11:19:40: Target reset

Mon Apr 06, 2020 11:19:41: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.mac

Mon Apr 06, 2020 11:19:41: Downloaded C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\template\TCFLASH Debug\Exe\template.out to flash memory.

Mon Apr 06, 2020 11:19:41: 4272 bytes downloaded into FLASH (2.20 Kbytes/sec)

Mon Apr 06, 2020 11:19:41: Loaded macro file: C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\template\..\..\config\tcflash.mac

Mon Apr 06, 2020 11:19:41: Disabling MPU and Caches...

Mon Apr 06, 2020 11:19:41: Loaded debugee: C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\template\TCFLASH Debug\Exe\template.out

Mon Apr 06, 2020 11:19:41: LowLevelReset(software, delay 200)

Mon Apr 06, 2020 11:19:41: Calling reset script: SoftwareReset

Mon Apr 06, 2020 11:19:41: LowLevelReset(script, delay 200)

Mon Apr 06, 2020 11:19:41: Calling reset script: ResetAndStopAtEndOfBootROM

Mon Apr 06, 2020 11:19:41: 4272 bytes verified (245.40 Kbytes/sec)

Mon Apr 06, 2020 11:19:41: Download completed and verification successful.

Mon Apr 06, 2020 11:19:41: LowLevelReset(software, delay 200)

Mon Apr 06, 2020 11:19:41: Calling reset script: SoftwareReset

Mon Apr 06, 2020 11:19:41: Target reset

Mon Apr 06, 2020 11:19:41: INFO: Configuring trace using 'Auto,size_limit=25%' setting ...

Mon Apr 06, 2020 11:19:41: Trace: Using detected ETMv3 at address 0x8009c000

Mon Apr 06, 2020 11:19:41: Trace: ETMv3 is not powered-up (ETMCR=0x441)

Mon Apr 06, 2020 11:19:41: Trace: ETMv3 powered-up OK (ETMCR=0xc40)

Mon Apr 06, 2020 11:19:41: Trace: Access to detected ETMv3(architecture=3.3) initialized (CONF=0x8d254024, CTRL=0xc40, IDR=0x4104f230)

Mon Apr 06, 2020 11:19:41: Trace: Using detected ETB at address 0x80001000, RAM size 0x1000 words (16KB)

Mon Apr 06, 2020 11:19:41: Trace: Configured as 'ETMv3 to ETB' (SW ver:  Trace2=1.33 ETM=1.00 ETB=1.05 Deco=1.42)

Mon Apr 06, 2020 11:19:41: Could not measure 'ITrgPwr' when ETM/ETB mode is active.

Mon Apr 06, 2020 11:19:41: There was 1 warning during the initialization of the debugging session.

Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'SVC_STACK' (currently 0x00000018) is outside the stack range (0x00000A00 to 0x00000A80)

Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'IRQ_STACK' (currently 0x00000020) is outside the stack range (0x00000A80 to 0x00000B00)

Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'FIQ_STACK' (currently 0x00000028) is outside the stack range (0x00000B00 to 0x00000B80)

Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'UND_STACK' (currently 0x00000008) is outside the stack range (0x00000B80 to 0x00000C00)

Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'ABT_STACK' (currently 0x00000010) is outside the stack range (0x00000C00 to 0x00000C80)

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1 Solution
Ashish
Moderator
Moderator

Hi ,

This occurs as they (stack pointers) might not be properly configured in the startup file/ linker script. Can you try to override this and check? (Please refer attached screenshot). Also, if the warning is not important, you can suppress it by unchecking: Tools > Options... > Stack > 'Warn when stack pointer is out of bounds'

stack_iar.PNG

By the way, can you attach your project file if possible?

Regards,

Ashish

View solution in original post

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11 Replies
Ashish
Moderator
Moderator

Hi ,

This occurs as they (stack pointers) might not be properly configured in the startup file/ linker script. Can you try to override this and check? (Please refer attached screenshot). Also, if the warning is not important, you can suppress it by unchecking: Tools > Options... > Stack > 'Warn when stack pointer is out of bounds'

stack_iar.PNG

By the way, can you attach your project file if possible?

Regards,

Ashish

View solution in original post

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RoCo_4660301
New Contributor

Hi, here is the link to the project, i upload it to google drive as zip.

Template 3200.zip - Google Drive

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RoCo_4660301
New Contributor

Hi, I've manage to solve the stack pointer warnings by enabling to override the linker configuration file: Project > Options > Linker > Config.

But now the following warning shows:

Wed Apr 08, 2020 11:04:39: IAR Embedded Workbench 8.50.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll)

Wed Apr 08, 2020 11:04:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\Cypress\S6J3200.dmac

Wed Apr 08, 2020 11:04:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\Cypress\TRAVEO_DEBUG.dmac

Wed Apr 08, 2020 11:04:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.mac

Wed Apr 08, 2020 11:04:39: Loading the I-jet driver

Wed Apr 08, 2020 11:04:39: Probe: Probe SW module ver 1.65

Wed Apr 08, 2020 11:04:39: Probe: Option: trace(Auto,size_limit=25%)

Wed Apr 08, 2020 11:04:39: Probe: Found I-jet, SN=88726

Wed Apr 08, 2020 11:04:39: Probe: Opened connection to I-jet:88726

Wed Apr 08, 2020 11:04:39: Probe: USB connection verified (15603 packets/sec)

Wed Apr 08, 2020 11:04:39: Probe: I-jet, FW ver 7.2, HW Ver:B

Wed Apr 08, 2020 11:04:39: Probe: IJET-ARM20 adapter detected

Wed Apr 08, 2020 11:04:39: Probe: Versions: JTAG=1.85 SWO=1.40 A2D=1.73 Stream=1.50 SigCom=2.44

Wed Apr 08, 2020 11:04:39: Emulation layer version 4.61

Wed Apr 08, 2020 11:04:39: JTAG clock detected: 12MHz

Wed Apr 08, 2020 11:04:39: JTAG chain "TDI->TAP#1[IR=5]->TAP#0[Cortex:IR=4]->TDO" verified.

Wed Apr 08, 2020 11:04:39: Notification to core-connect hookup.

Wed Apr 08, 2020 11:04:39: Connected DAP on JTAG. Detected DP ID=0x0.

Wed Apr 08, 2020 11:04:39: Connecting to TAP#0 DAP APB-AP port 1 (IDR=0x24770002) to core Cortex-R5 r1p3 at 0x80090000.

Wed Apr 08, 2020 11:04:39: Debug authentication:

Wed Apr 08, 2020 11:04:39:   Non-secure invasive debug not implemented

Wed Apr 08, 2020 11:04:39:   Non-secure non-invasive debug not implemented

Wed Apr 08, 2020 11:04:39:   Secure invasive debug enabled

Wed Apr 08, 2020 11:04:39:   Secure non-invasive debug enabled

Wed Apr 08, 2020 11:04:39: Debug resources: 8 H/W breakpoints, 8 watchpoints, 1 context ID breakpoints.

Wed Apr 08, 2020 11:04:39: CPU status OK

Wed Apr 08, 2020 11:04:39: LowLevelReset(script, delay 200)

Wed Apr 08, 2020 11:04:39: Calling reset script: ResetAndStopAtEndOfBootROM

Wed Apr 08, 2020 11:04:39: ----- Prepare hardware for flashloader -----

Wed Apr 08, 2020 11:04:39: Disabling Caches...

Wed Apr 08, 2020 11:04:39: Configuring and initializing TCRAM (128KB)...

Wed Apr 08, 2020 11:04:39: Initializing System RAM (384KB)...

Wed Apr 08, 2020 11:04:40: Clear WDT

Wed Apr 08, 2020 11:04:40: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.out

Wed Apr 08, 2020 11:04:40: Target reset

Wed Apr 08, 2020 11:04:41: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.mac

Wed Apr 08, 2020 11:04:41: Downloaded C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\port\blink_led\TCFLASH Debug\Exe\blink_led.out to flash memory.

Wed Apr 08, 2020 11:04:41: 6272 bytes downloaded into FLASH (3.77 Kbytes/sec)

Wed Apr 08, 2020 11:04:41: Loaded macro file: C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\port\blink_led\..\..\..\config\tcflash.mac

Wed Apr 08, 2020 11:04:41: Disabling MPU and Caches...

Wed Apr 08, 2020 11:04:41: Loaded debugee: C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\port\blink_led\TCFLASH Debug\Exe\blink_led.out

Wed Apr 08, 2020 11:04:41: LowLevelReset(software, delay 200)

Wed Apr 08, 2020 11:04:41: Calling reset script: SoftwareReset

Wed Apr 08, 2020 11:04:41: LowLevelReset(script, delay 200)

Wed Apr 08, 2020 11:04:41: Calling reset script: ResetAndStopAtEndOfBootROM

Wed Apr 08, 2020 11:04:41: 6272 bytes verified (278.41 Kbytes/sec)

Wed Apr 08, 2020 11:04:41: Download completed and verification successful.

Wed Apr 08, 2020 11:04:41: LowLevelReset(software, delay 200)

Wed Apr 08, 2020 11:04:41: Calling reset script: SoftwareReset

Wed Apr 08, 2020 11:04:41: Target reset

Wed Apr 08, 2020 11:04:41: INFO: Configuring trace using 'Auto,size_limit=25%' setting ...

Wed Apr 08, 2020 11:04:41: Trace: Using detected ETMv3 at address 0x8009c000

Wed Apr 08, 2020 11:04:41: Trace: Access to detected ETMv3(architecture=3.3) initialized (CONF=0x8d254024, CTRL=0xc40, IDR=0x4104f230)

Wed Apr 08, 2020 11:04:41: Trace: Using detected ETB at address 0x80001000, RAM size 0x1000 words (16KB)

Wed Apr 08, 2020 11:04:41: Trace: Configured as 'ETMv3 to ETB' (SW ver:  Trace2=1.33 ETM=1.00 ETB=1.05 Deco=1.42)

Wed Apr 08, 2020 11:04:41: Could not measure 'ITrgPwr' when ETM/ETB mode is active.

Wed Apr 08, 2020 11:04:41: There was 1 warning during the initialization of the debugging session.

Wed Apr 08, 2020 11:04:41: Stopped by a vector catch:

Wed Apr 08, 2020 11:04:41: Undefined Instruction

Wed Apr 08, 2020 11:04:44: No available core has been found.

What can it be due to?

EDIT: nevermind, pointer outside range continue to appears after running some instructions. Also this shows in the debug log: 'PC set to 0xFFFF0010, but ARM/THUMB mode is unknown'

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Ashish
Moderator
Moderator

Hi ,

s6j32hel and s6j32gel are very similar (one has Ethernet RMII support enabled, other does not). So, there should be no setting changes and it should work. I could successfully program/debug your project . Interestingly, I used s6j328cl which has different flash memory, but there is no issue even with this device at my end (attaching the screenshot). Note that I did not make any modification to your project, so I don't think you need to make any modification. By the way, can you tell if there was some other modification that you had done in IAR? Also, if you have any otherTraveo board, perhaps you can try to flash this project on that board (just to be sure that this is nothing to do with that specific hardware).

The warning "Could not measure 'ITrgPwr' when ETM/ETB mode is active" appears for me also. If you do not need to measure the target current (power) consumption, then this may be ignored. I am still looking why this is happening.

Capture_iar_issue.PNG

Regards,

Ashish

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Ashish
Moderator
Moderator

Hi,

Can you attach the map file which is being generated in the IAR (when no changes was done to the project file that you had attached)? It is generated in the output section.

Regards,

Ashish

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RoCo_4660301
New Contributor

Here is the map file: blink_led.map - Google Drive

Currently I can't have access to another board.

The project configuration i have is:

  • General Options
    • Device: s6j32gel
    • Floating point settings: VFPv3
  • C/C++ compiler
    • Processor mode: Arm
    • Optimization level: Low
  • Linker
    • Linker configuration file: checked "override default" with s6j32xExxx.icf
  • Debugger
    • Driver: I-jet
    • Device description file: checked "override default" with S6J32GEL.ddf
    • Download > checked "override default .board" with S6J32xExxx.board
  • I-jet
    • Reset: "reset and halt after bootloader"
    • Target power: checked "switch off after debugging"

Can you tell me which version of iar are you using?

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RoCo_4660301
New Contributor

Would you think that changing the stacks values manually in the register view can solve momentaneously the problem?

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Ashish
Moderator
Moderator

Hi,

Do we have any updates here? I could not reproduce this, it may be related to your specific environment for the IAR IDE. Could you please post your latest update?

Thanks,

Ashish

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RoCo_4660301
New Contributor

Hi,

No new updates, i'm hoping to go back to office in few days so i can try with other MCUs.

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Ashish
Moderator
Moderator

Hi,

Were you able to check on this? Any updates?

Regards,

Ashish

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Ashish
Moderator
Moderator

Hi,

I has used IAR 8.50 , same as yours, strangely I did not get this warning. It would be difficult to fix unless I can reproduce this. But I will update you if I can find the cause. I think you can try to change the stack value (as suggested in my first response) and see if it resolves the issue, I think it should solve this. By the way, is  this warning affecting the code functionality (is the code working properly in the device) ? Are you getting any issue while debugging because of this?

Regards,

Ashish

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