What is the length matching requirements for the Address, Data and control group of Async SRAM

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user_2283911
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Hello,

We are using Async SRAM "CY7C1021DV33-10ZSXI" from cypress.

As per datasheet and other design guideline document from cypress, there is no length matching requirements listed.

but as it is a parallel bus, we believe there should be length matching requirements for these Address and control group and data group.

so, let us know the length matching requirements for the Async SRAMs.

Thanks and Regards

Tarang Jindal

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PradiptaB_11
Moderator
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500 replies posted 250 solutions authored 250 replies posted

Hi,

You should follow length matching for the signals (Address, data and control)

The reason being, these devices might operate at 75 or 100MHz (max) and depending on the controller setup times, there might be scenarios where the delay in longest line might case incorrect data sampling during read or incorrect writes.

Even in our internal system designs, we prefer to have length matched tracks.

The Speeds are slow, but its the edges of control and data lines that might result in failures if falsely classified as logic 0 or 1.

Thanks and Regards,

Pradipta.

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PradiptaB_11
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

Hi,

You should follow length matching for the signals (Address, data and control)

The reason being, these devices might operate at 75 or 100MHz (max) and depending on the controller setup times, there might be scenarios where the delay in longest line might case incorrect data sampling during read or incorrect writes.

Even in our internal system designs, we prefer to have length matched tracks.

The Speeds are slow, but its the edges of control and data lines that might result in failures if falsely classified as logic 0 or 1.

Thanks and Regards,

Pradipta.

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Hello Pradipta,

Thanks for the valuable information.

can you suggest us that how much be the length matching tolerance for a 100MHz operation, like should we go with a very tight length matching figures like +/-10 mils or we can have a relexed length matching up to +/-50 mils.

Thanks and Regards

Tarang Jindal

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Hi Tarang,

It is hard to quantify the length without knowing the material. But having a trace delay difference of around 100ps between these signals should be OK.

If this is an FR-4 board, perhaps that offers you a lot of margin. Lesser the delay difference, the better.

I hope this helps you address the issue.

Regards,

Nilesh

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