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Solved! Go to Solution.
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Memory ASYNC
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Memory SRAM
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Memory SYNC
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Hi,
All the pins which are input pins or output pins will have the Input capacitance or output capacitance as 10 pF. So all the control signal pins are included in this set and the I/O lines as well. I hope that answers your question.
Thanks,
Pradipta.
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Hi,
All the pins which are input pins or output pins will have the Input capacitance or output capacitance as 10 pF. So all the control signal pins are included in this set and the I/O lines as well. I hope that answers your question.
Thanks,
Pradipta.
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Hi,
Thanks for your reply.
I just compared the CYPRESS part "CY62148EV30LL-45ZSXIT" with our current production part "RMLV0408EGSB-4S2#HA1" to get an approval in our system. I need to rationalize the below two specs which is worse for the cypress part. Could you please provide what will be the impact of that below parameter.
Thanks,
Sathish
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Hi Sathish,
Higher capacitance may cause slower rise/fall time. Which can eventually effect the write/read cycle time. It may not be a problem if the system have enough settling time for the signals. You will need to check the cycle time for your application. Also this is the worst case scenario. You can use our IBIS model to observe the difference if possible.
Thanks,
Pradipta.