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SRAM

Anonymous
Not applicable

Hello,

   

We are working on simulations using one of your memory component : CY7C25652KV18. We are using your IBIS model, named : qdr2pb4l25_cy25xx2.ibs in date of December 1st, 2010.

   

when using the INPUT models with internal ODT (for example INPUT525_TSF_1.8), it seem that the signal is centered on 500mV, but the expected value is 900mV (Vref = Vcc/2). There is also another problem on the INPUT525_TT_1.5 model which has inconsistent results for slow and fast corners.

   

What do you advice for the use of these models ? Do you have some updates for these models that could solve the problems mentionned above ?

   

Thanks,

   

Jerome

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1 Solution
PriteshM_61
Employee
Hi Jerome
   
I have attached the model with this intercation. Please let us know if you find any issues with the same.
   
Also you can initiate a technical support case if you have further queries on our devices.
   
Thanks again for your feedback and looking forward to working with you in your designs.      

View solution in original post

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2 Replies
PriteshM_61
Employee
Hi Jerome
   
I have attached the model with this intercation. Please let us know if you find any issues with the same.
   
Also you can initiate a technical support case if you have further queries on our devices.
   
Thanks again for your feedback and looking forward to working with you in your designs.      

View solution in original post

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Anonymous
Not applicable

Hello PRIT. The new model has solved the problem. What happened with the old one ? May we have some confidence in the results of the new one ?

   

Thanks,

   

Jérôme

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