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SRAM

Anonymous
Not applicable

 Hello all, 

   
   

I'm quite confused by the references to ODT in the datasheets and application notes. 

   
   

I'm reading this one: 

   
   

http://www2.cypress.com/?rID=49774

   
   

and this one:

   
   

http://www.cypress.com/?docID=26097

   
   

From what I can tell, the output drive impedance is set to RQ/ 5.0 (where RQ is the resistor attached between ZQ and ground). No problems. That's confirmed by looking at various other manufacturer's datasheets -- presumeably its in the standard. 

   
   

So, for my board's 50R characterisitic impedance, I want to set this to 250R. 

   
   

Where it gets confusing is the ODT. With the high range set, you get a receive termination of RQ / 1.66, and with the low range set you get a receiver termination of RQ / 3.33. Now, given I need 250R for my drivers, how do I get a receiver termination value of 50R to match my board's 50R traces. Surely this is about the most common impedance to design a board for? 

   
   

Any clarification would be very much appreciated. 

   
   

Snowy.

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1 Solution
Anonymous
Not applicable

Hi Snowy,

   

           For Low Range setting, ODT impedance =RQ/3.33

   

          For High Range setting, ODT impedance =RQ/1.66

   

If RQ=250ohms, then ODT impedance for low range setting would be 75ohms

   

If RQ=250ohms, then ODT impedance for high range setting would be 150ohms

   

The closest to the 50ohms, for the ODT setting you can achieve is with a low range ODT is 52.5 ohms. For this the RQ impedance would have to be 175ohms.

   

In short you cannot have the RQ and ODT impedance equal .

   

 

   

Hope this helps.

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Anonymous
Not applicable

Hi Snowy,

   

           For Low Range setting, ODT impedance =RQ/3.33

   

          For High Range setting, ODT impedance =RQ/1.66

   

If RQ=250ohms, then ODT impedance for low range setting would be 75ohms

   

If RQ=250ohms, then ODT impedance for high range setting would be 150ohms

   

The closest to the 50ohms, for the ODT setting you can achieve is with a low range ODT is 52.5 ohms. For this the RQ impedance would have to be 175ohms.

   

In short you cannot have the RQ and ODT impedance equal .

   

 

   

Hope this helps.

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Anonymous
Not applicable

Thanks for the reply! 

   

 

   

Because the drive strength for the outputs is also dependent on RQ, doesn't that mean that it's impossible to have the same trace impedance for both the TX and the RX lines? i.e. if I want to have a drive strength to match my 50R traces, I need to have a 250R RQ. Is it then impossible to achieve a suitable termination for the same 50R line for which my board is designed? Does this then make the ODT feature unuseable, or is there some trick to this which I'm missing? 

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Anonymous
Not applicable

Hi Snowy,

   

               Yes you are correct that it is not possible to have same  impedance for both TX and RX lines at the same time.

   

However, the way to get around this is as follows:

   

Say you have a trace impedance of 50ohms.You can use a RQ value of 175 ohms.This would result in the output impedance to be RQ/5=35ohms.You can use a 15ohm  resistor in series  with the O/P driver to match the trace impedance of 50ohms (35ohms + 15ohms). 

   

The ODT impedance corresponding to RQ=175ohms for ODT low range setting will be RQ/3.33 =52.5ohms which is close to 50ohms.

   

Hope this helps.

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Anonymous
Not applicable

 Hi

   

         I am working on the xilinx board which is having the QDRll+  memory controller with SRAM of the CYPRESS.I have doubt that the QDRll+ memory controller did not genetrate the ODT pin . I want to that it will effect theclaibration of the memory if ODT is high impendance and i am working 200 Mhzs frequncy . I am using the memory part CY7C2563KV18. 

   

 Does the ODT effect the clabiration of the memory .

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Anonymous
Not applicable

 Hi

   

         I am working on the xilinx board which is having the QDRll+  memory controller with SRAM of the CYPRESS.I have doubt that the QDRll+ memory controller did not generate the ODT pin . I want to that it will effect the calibration of the memory if ODT is high impedance and i am working 200 Mhzs frequency . I am using the memory part CY7C2563KV18. 

   

 Does the ODT effect the calibration of the memory .

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Employee

Hello Subashbabu,

   

 

   

I believe, you are performing some experiments on Xilinx’s Evaluation kit board and the calibration is failing. If the controller does not generate the ODT signal then ODT of the memory pin might be floating. When ODT pin is floating, a high range termination value is selected by default which follows RQ/1.66 for 175 W <RQ <250  W (where RQ is the resistor tied to ZQ pin).

   

If the input impedance of memory do not match with FPGA output impedance then signal integrity issues comes into the picture and this could be the reason for the calibration failure. Please check the DCI settings for FPGA and ODT settings for QDRII+ SRAM, They should match.

   

 

   

The other reason could be the terminations on the memory pins (which do not have ODT) but this is Xilinx board so it should have verified reference design.

   

 

   

There might be a problem with core generation. Please try to operate the memory at different frequencies. If it works then you might need to change some timing parameters.

   

 

   

Thanks

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Anonymous
Not applicable

 HI

   

     Thanks . There is termination problem on board. The pin of the ODT left open. 

   

Thanking you

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Anonymous
Not applicable

 HI

   

     Thanks . There is termination problem on board. The pin of the ODT left open. Working around it.

   

Thanking you

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Anonymous
Not applicable

Hi

   

   As you said that RQ from the

   

 For Low Range setting, ODT impedance =RQ/3.33

   

          For High Range setting, ODT impedance =RQ/1.66

   

If RQ=250ohms, then ODT impedance for low range setting would be 75ohms

   

If RQ=250ohms, then ODT impedance for high range setting would be 150ohms

   

 

   

In another doc of the cypress there mention that the below (In the Knowledge Base Aritcle KBA84386)

   

An external resistor, RQ, must be connected between the ZQ pin on the SRAM and VSS to allow the SRAM to adjust its output driver impedance. The value of RQ must be 5x the value of the intended line impedance driven by the SRAM, hence RQ value is 250 Ω to match output impedance of 50 Ω in Figure 1a and Figure 1b. The allowable range of RQ to guarantee impedance matching with a tolerance of ±15% is between 175 Ω and 350 Ω, with VDDQ = 1.5 V. The output impedance is adjusted every 1024 cycles upon power up to account for drifts in supply voltage and temperature. 

   

On the xilinx board has the termination of the 50 ohms(IOSTANDARD of HSTL_I which gives the 50 ohms), which statement i have take, if both are correct than how.

   

 

   

Thanking you

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Anonymous
Not applicable

 hi

   

     The RQ resistance can be directly take as a 166.5 ohms, if not i have to follow the 175ohms < RQ<350 ohms. Because if i use the 166.5 ohms it gives the 50ohms termination.  if 175 ohms is also ok it gives to 52.222ohms. 

   

Thanking you

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Anonymous
Not applicable

 HI

   

   The both are correct . One is for the input termination problem and another is for the ODT termination .

   

In the ODT termination device the 

   

   output resistance is R <= RQ/5;

   

input resistance is R <=  RQ/3.33 if(175 ohms <RQ < A-O) 

   

                                       RQ/1.66 if(175 ohms <RQ < 250 ohms)

   

IF the there is no ODT termination then

   

 input and output termination 

   

 R <= RQ/5 -> RQ =250 ohms

   

the R vale depends upon the termination the device.

   

 

   

Thanking you

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Anonymous
Not applicable
        RQ minimum has to be 175 ohms.   
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