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SRAM

Max_Power
New Contributor II

Hello!

We have been using the CP62167EV30LL-45BVXI memory on our modules since 2014.

We were affected by the AN66311 in 2014
"TIMING RECOMMENDATIONS FOR BYTE ENABLES AND CHIP ENABLES IN MOBL (R) SRAMS - AN66311"

After this bug was fixed by Cypress and we received new CP62167EV30 components, the error on our modules disappeared.

Until now in 2021.

Memory errors are now increasingly occurring on our assemblies during the final inspection, failure rate approx. 50%. After asking us, we were able to determine that Cypress has changed this SRAM from 90nm technology to 65nm technology.

Hello!

I looked at the data sheet and compared it with the old one and couldn't see any significant changes. An analysis of the memory accesses, timing, etc. on the defective assemblies has not been successful either.

If defective modules from production are equipped with the previous 90nm CP62167EV30LL-45BVXI, then they will function properly again.

Could it be that by changing the technology from 90nm to 65nm, the old bug from AN66311 was redesigned.

I am grateful for a quick answer.

greeting
Max power

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1 Solution
PradiptaB_11
Moderator
Moderator

Hi,

The bug reported in the AN66311 was fixed and it is unlikely that you will be affected by it in the newer lots or in the new technology node of 65 nm. It may be an issue related to some timing violations but to be sure we will need to check this thoroughly.

1)Can you share with us the schematics of the memory portion ?

2) Can you send us the read and write scope shots for a failing unit and a old passing unit ?

If you are not okay to sharing these on public forum we will move to a tech support case.

Thanks,

Pradipta.

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