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SRAM

AbPe_3615041
New Contributor

I am interfacing QorIQ Processor with SRAM memory (CY62167G18-55ZXI). I am unable to know how to interface BLE#(Byte Low Enable) and BHE#(Byte High Enable) signals present on SRAM to the processor.

CY62167G18-55ZXI
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PradiptaB_11
Moderator
Moderator

Hi Abhijit,

Using any external logic or not will depend on you.

You may assert the two pins BHE# and BLE# by connecting to GND and use the WE# and OE# and CE# pins to control the chip. WE# pin can control the writes, OE# pin can control the reads while CE# can used to select and deselect the chip.

You may want to use the flexibility provided by the BHE# and BLE# pins and if you do not have any dedicated pins for it you can connect any GPIO pins to it and formulate the code/Software in a desired fashion.

Kindly refer to the truth table on page 16 of the datasheet which shows the logic state of all the control signals and the operation performed by the device.

Thanks and Regards,

Pradipta.

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