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SRAM

MaCh_4815156
New Contributor

We are looking at using 2x CY62167GE30-45ZXI for our application to get 4 MB SRAM memory.  I understand the single SEC functionality of the ECC, but is there any way of detecting when double errors have occurred?   

Out application is for a potentially high radiation environment so will likely hit the 100% chance for MBU listed in AN88889 frequently.

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1 Solution
PradiptaB_11
Moderator
Moderator

Hi Matt,

If your application is likely with high radiation then we can suggest you to check for radiation hardened parts in 4 MB density like CYRS1049G.

These parts are made for specifically high radiation conditions and can provide you with satisfactory performance. You can always reach out to the nearest Cypress FAE or distributors for more information on this part. (Or Create a case with us, where we can share the datasheet. Cannot share in forum as it is confidential)

As far as detection and correction of MBUs, it is not supported by Cypress’s ECC architecture. Devices with the ERR pin will flag the MBU

however, the condition of the data is not corrected in such a scenario, and it may contain MBUs

Thanks,

Pradipta.

View solution in original post

3 Replies
PradiptaB_11
Moderator
Moderator

Hi Matt,

If your application is likely with high radiation then we can suggest you to check for radiation hardened parts in 4 MB density like CYRS1049G.

These parts are made for specifically high radiation conditions and can provide you with satisfactory performance. You can always reach out to the nearest Cypress FAE or distributors for more information on this part. (Or Create a case with us, where we can share the datasheet. Cannot share in forum as it is confidential)

As far as detection and correction of MBUs, it is not supported by Cypress’s ECC architecture. Devices with the ERR pin will flag the MBU

however, the condition of the data is not corrected in such a scenario, and it may contain MBUs

Thanks,

Pradipta.

View solution in original post

MaCh_4815156
New Contributor

Hi PradiptaB_11,

We are quite keen on the CY62167GE30 for this application, but thank you for your advice about the alternative part.

To confirm, the functionality of the CY62167GE30 is as below?

  • For SBU - Error is corrected on output and ERR flag is set.  MCU then has to write the data back into the memory to correct it.
  • For MBU - Error is detected and ERR flag is set, but the output data is not corrected.

How can we differentiate between a SBU (which has been corrected) and a MBU (which has not) if there is only one ERR pin?

Thanks.

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PradiptaB_11
Moderator
Moderator

Hi Matt,

For SBU your interpretation is correct. The detection and correction of MBUs is not supported by Cypress’s ECC architecture. Devices with the ERR pin will flag the MBU; however, the condition of the data is not corrected in such a scenario, and it may contain MBUs. However, the time to reach the critical accumulated soft error threshold NTH depends on the generation rate of the soft errors and the application mode. One option to completely eliminate this potential issue is to refresh the impacted memory cells with the correct data whenever an upset is detected and flagged by the ERR pin. This will prevent multiple SEUs from accumulating and turning into MBUs

To answer your question on how to differentiate between a SBU and MBU, the device cannot do that. By our calculations we have shown that it can be concluded that the accumulation effect is not of concern for commercial and industrial applications, even if the memory is not updated over its entire product life. This is not the best part for a high Radiation application.

You can refer to our app note AN88889 for more information.

Thanks,

Pradipta.

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