Dec 19, 2018
06:22 PM
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Dec 19, 2018
06:22 PM
Hello,
Customer refer to the SRAM read control by "Figure 15. Read Cycle No. 3" in the datasheet on page 12.
In this access, is it possible to read data correctly from SRAM even when "OE goes to Low before CE goes to Low"?
MCU will act the OE signal to Low about 20ns faster than CS signal to Low in worst case.
MPN : CY7C1061G/GE
http://www.cypress.com/file/46676/download
Best Regards,
Naoaki Morimoto
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Anonymous
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Dec 20, 2018
10:55 PM
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Dec 20, 2018
10:55 PM
Hello Morimoto-san,
There will not be any problem if OE goes LOW before CE. The data will be available tACE time after CE goes LOW.
Regards,
Nada
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