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PSoC 6 Timer Counter PWM (TCPWM) Block

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PSoC 6 Timer Counter PWM (TCPWM) Block


Here is an introduction to the PSoC 6 Timer Counter PWM (TCPWM) block.

PSoC 6 has two blocks TCPWM. One block contains eight 32-bit counters. The other contains twenty-four 16-bit counters. Each counter can be configured to run as a Timer, Counter, PWM or Quadrature decoder. Counters allow an external signal to capture the current count. Timers can have a programmable compare value which can be used to trigger another event in the system. All the counters in a TCPWM block can be synchronized together for applications such as motor control. Specifically the counters can be started and stopped at the same time.

Will be posting more on this feature. Feel free to leave comments or ask questions, we appreciate the feedback!


Here's the overview from the PDL API Reference.

The TCPWM driver is a multifunction driver that implements Timer Counter, PWM, and Quadrature Decoder functionality using the TCPWM block.

Each TCPWM block is a collection of counters that can all be triggered simultaneously. For each function call, the base register address of the TCPWM being used must be passed first, followed by the index of the counter you want to touch next. For some functions, you can manage multiple counters simultaneously. You provide a bit field representing each counter, rather than the single counter index).

The TCPWM supports three operating modes:

  • Timer/Counter
  • PWM
  • Quadrature Decoder


Use this mode whenever a specific timing interval or measurement is needed. Examples include:

  • Creating a periodic interrupt for running other system tasks
  • Measuring frequency of an input signal
  • Measuring pulse width of an input signal
  • Measuring time between two external events
  • Counting events
  • Triggering other system resources after x number events
  • Capturing time stamps when events occur

The Timer/Counter has the following features:

  • 16- or 32-bit Timer/Counter
  • Programmable Period Register
  • Programmable Compare Register. Compare value can be swapped with a buffered compare value on comparison event
  • Capture with buffer register
  • Count Up, Count Down, or Count Up and Down Counting modes
  • Continuous or One Shot Run modes
  • Interrupt and Output on Overflow, Underflow, Capture, or Compare
  • Start, Reload, Stop, Capture, and Count Inputs


Use this mode when an output square wave is needed with a specific period and duty cycle, such as:

  • Creating arbitrary square wave outputs
  • Driving an LED (changing the brightness)
  • Driving Motors (dead time assertion available)

The PWM has the following features:

  • 16- or 32-bit Counter
  • Two Programmable Period registers that can be swapped
  • Two Output Compare registers that can be swapped on overflow and/or underflow
  • Left Aligned, Right Aligned, Center Aligned, and Asymmetric Aligned modes
  • Continuous or One Shot run modes
  • Pseudo Random mode
  • Two PWM outputs with Dead Time insertion, and programmable polarity
  • Interrupt and Output on Overflow, Underflow, or Compare
  • Start, Reload, Stop, Swap (Capture), and Count Inputs
  • Multiple Components can be synchronized together for applications such as three phase motor control

Quadrature Decoder

A quadrature decoder is used to decode the output of a quadrature encoder. A quadrature encoder senses the position, velocity, and direction of an object (for example a rotating axle, or a spinning mouse ball). A quadrature decoder can also be used for precision measurement of speed, acceleration, and position of a motor's rotor, or with a rotary switch to determine user input.
The Quadrature Decoder has the following features:

  • 16- or 32-bit Counter
  • Counter Resolution of x1, x2, and x4 the frequency of the phiA (Count) and phiB (Start) inputs
  • Index Input to determine absolute position
  • A positive edge on phiA increments the counter when phiB is 0 and decrements the counter when phiB is 1
New Contributor II

So do I understand this correctly, that with PSoC6 we could use 24+8 PWM components, without using any UDBs? Or are UDBs still used for the non-standard configurations.

In PSoC5 you generally have 4 fixed-function timer/PWM blocks. These are not equivalent to the 2 TCPWM blocks here, I assume? But rather to the 24+8 counter/PWM units?

Valued Contributor

As far as i can understand PSoC6 is more like a PSoC4 on steroids (not a superset of PSoC5LP), i am more familiar with 5LP devices but i think the TCPWM blocks are not based on UDBs (PSoC4 devices have up to 8 UDBs only, TCPWM are another blocks).

If i'm wrong correct me i'm not very familiar with PSoC4

Not applicable


You are both correct, TCPWMs are dedicated digital blocks that are not using UDBs, that offer Timer/Counter/PWM capabilities. In PSoC Creator, if you lookup the TCPWM Component, you have the option to choose from one of these capabilities. On top of this, you have 12 UDBs that you can freely use.

Thanks and let me know if you have more questions.

New Contributor II

Thanks for the clarification! Our engineers will be happy, to have so many PWM component available
Will all PSoC 6 variants have these two TCPWM blocks, or will there be versions with more or less functionality?

Not applicable


Yes, all the different PSoC 6 lineups will have these 2 types of TCPWM blocks. We also have plans for PSoC 6 lineups with more UDBs and analog resources as well.


Not applicable


I have a specific question regarding the counters:

What will be the max. frequency that the counters could count?

Or in other words: How small could a pulse be, that a counter would recognize it as a pulse?

Thanks in advance!

New Contributor II

As far as I'm aware they can run with any clock up to the master clock frequency, so 100MHz and 150MHz depending on the core you are using. But feel free to correct me

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