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[CCGx Power SDK] If system has external VDDD source, internal VBUS regulator shall be turned off


[CCGx Power SDK] If system has external VDDD source, internal VBUS regulator shall be turned off


1. CCG3PA VDDD is input and output power pin and specifications as below. 

VDDD power supply input voltage specifications as below. ( If you are designing a DRP, recommend to select 3.0 -5.5V range.)



VDDD power output voltage specification is 3.3V. (When powered through VBUS_IN_DISCHARGE, the internal regulator generates VDDD of 3.3 V for chip operation. When powered through the VBUS_IN_DISCHARGE pin, VDDD cannot be used to power external devices and should be connected to a 1-µF capacitor for the regulator stability only. )


2. CCG3PA example code in CCGx power SDK have disabled internal regulator by default as per the schematic design based on CY4532 and existing referred customize EVKs.

Before any bring up or debug firmware customize, check the API void pd_hal_disable_vreg(uint8_t port) in the based example project at first to clear default setting. 


3. If the design is DRP and supporting dead battery case (CCG3PA have Rd_DB for dead battery case support.), the internal regulator shall be adjust as per the conditions of battery.  So that, CCGx Power SDK have three condition to disable internal regulator for your reference. This is recommendation and example/experience, it is low risk to adjust it as per real case. 

(1)  if device is powered by external VDDD (i.e not in dead battery), disable internal VBUS regulator.

if (dpm_stat->dead_bat == false)
pd_hal_disable_vreg (port);

(2) If the device is on disconnect and type-C error recovery.


(3) Battery is weak but TYPE-C port is providing power to system. Check if Battery voltage is more than the voltage level of back to power supply the board from battery. if yes, disable internal regulator.

if (vbatt >= pd_get_ptr_bat_chg_tbl(TYPEC_PORT_0_IDX)->vbatt_dischg_en_volt)
pd_hal_disable_vreg (TYPEC_PORT_0_IDX);

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Last update:
‎Sep 08, 2021 07:33 PM
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