|1.1||Added Aligned Memory Accesses||10/28/14|
Hello Community Members,
This BLOG should be used as a "guide" for examining the Memory Map configurations and Application Development.
This is a compilation of Memory Map questions and answers from several of our forum users and I thank you for your questions and answers.
The Memory Architecture consists of both RAM and ROM with external EEPROM in the BCM20732/36/37 devices.
The Memory Architecture of the BCM20732S/36S/37S consists of the RAM and ROM with Internal EEPROM.
ROM vs. RAM application assignment has caused some confusion in the past, so we eliminated this nomenclature in SDK 2.0.1.
The ROM contains:
ROM applications typically has some part of the application in the ROM and whatever user writes adds functionality to the ROM code
Application code is loaded in to NVRAM
RAM apps use LE Stack in the ROM
Let's take an example from ws_upgrade.c in [uart|ota]_firmware_upgrade sample app from SDK 2.0.1
Note: If you increase DLConfigVSLength, you may have to also increase ConfigDSLocation (which is the same as DS1 in the picture above) so that there is no overlap (the hex file conversion step when building will fail if it detects an overlap between the two regions).
Serial Flash images are not compressed (because SF reads has only ~3% overhead and decompressing will make it slower).
BCM20736 will not access more than ~128kbytes from the base but the API uses 24 bit addresses (serial flashes use 24 bit addresses), so the entire SF should be accessible
The virtual addresses used by the FW API for EEPROM and SF is different
0xFF000000 for EEPROM and 0xF8000000 for Serial FLASH
These offsets should be used with bleappfwu_*().
Patches take up 1900 bytes (today) assuming you only want the mandatory patches (no extra features that are being patched in).
So your application space gets ~28K (today)
MEMORY ARCHITECTURE BLOCK DIAGRAM:
Let's start with a Memory Map Diagram of the BCM20732:
The 30K is shared memory (between patches and the app) and the dynamically allocated buffers also take up some of this space.
The ‘total RAM footprint ‘ line at the end of the build is only the static portion of the app + patches (includes code + initialized and uninitialized data) in our flat memory model.
So you cannot take the app start address and add the app size and then subtract from 60K to get remaining size
The 4K CM3 Mapper is for the Cortex M3 Memory Map for Interrupts Stack, etc.
Note that our Stack (YELLOW) is 30K and is DATA ONLY.
The Patches Section (Features,Updates, etc) is combined with the User App but:
Static variables that are NOT initialized end up in the data area:
SDK 2.0 Hello_Sensor Example App:
As an example, we take the Hello_Senor App and using the SDK Console Window, we see the Patches Start/End Addresses:
The Patches and Application Start Addresses are listed below:
As you can see, there is overlap between Patches and Beginning of Application
So after the Patches are finished loaded, a portion of the RAM is available for the Application
Here is what is happening:
Question – How much memory do you have?
The NVRAM has a lot of headers.
Serial FLASH is similar 0 – 4K
Q: In the first diagram it suggests that the maximum size of an app should be 26K?
A: 26K is a good approximation because it really depends on what (HW/drivers/features) the app initializes and uses. cfa_mm_MemFreeBytes() is the ultimate authority on the amount of RAM available
Q: Is there any way to estimate the amount needed for 'dynamic allocation' in that first diagram?
A: Not really, this is allocated for OS buffers, TX and RX buffers, stack buffer pools, thread stacks, callback registrations etc.
Q: If I end up with a total ram footprint of 26K , I am nervous that I might get overruns?
Q: What is the maximum stack size?
A: The app thread stack size is 1K (1024 bytes).
Q: What is the amount of space available for global and static variables?
A: The app code + globals (initialized and zero-initialized) all share the same space. So allocating more globals will reduce space for app code and vice-versa.
Q: Are there any built in functions of the stack that can be turned off to save space, for example if I disable the battery status profile does that cut down on the footprint?
A: No, here's why
Disabling battery monitor will not give you more space because its in the ROM.
This BLOG should get you going and I will be adding more later.
The CPU core is an ARM Cortex M3 which supports unaligned accesses (so no exceptions will be thrown).
However, there is a performance penalty - the instruction will take multiple cycles to complete and the pipeline will stall (see ARM documentation). Load/Store multiple instructions do not support unaligned accesses.