Sorry for long title: I am curious why Buck and Boost technologies are used which are constrained by their inductive energy storage topology, when more modern topologies of the last decade are superior and more cost effective? A exciting new world of Power Electronics Topologies is rapidly emerging.
Significant improvement in efficiency and reduced cost is realized, not to mention also reduced size and increased power density.
I strongly recommend joining a growing group centered on Power Electronics Topologies, that is already bringing forward topologies that will replace the Buck and Boost technologies.
Has anyone at Cypress engineering considered the half dozen or so new topologies of the last 8 years which will ultimately replace the Buck and Boost technologies? The above link is one good example of this. The latest Cuk patents are leading the charge to the next level in Power Electronics design.
Combining PSoC chips with more flexible power modules could allow for user programmability of control subsystems, but more importantly allow for instrumenting the power management subsystem.
If the layouts/manufacturing are still being finalized or put into practice, then it isn't really practical to switch to the newer technologies due to cost constraints. Besides which, newer technologies have their own problems that eventually come out; Just not visible at the onset. Researching and examining alternate possibilities is (I would say) a requirement of succeeding at development and innovation. However, investing too many resources into a technology before it has matured becomes a risky investment due to it's propensity for failure.
The reason most people use buck/boost topologies is due to:
Knowledge (not knowing of other solutions that would work)
Application (based on requirements, there may be considerations for why certain topologies are chosen)
History (They have been around for so long, there is very little difficulty in implementation)
Patent (often times the inventor of new technology imposes licensing/costs)
It is pretty easy to say: "Here are new technologies that will replace the buck/boost converters!" But actually going about replacing them is where the issues arise.
Although, I applaud your encouragement to Cypress to pursue the newer technologies and to constantly push the boundaries
I agree with all the points you raise, and except for the possibility of licensing costs, I submit we have passed all those stages over the course of a decade now, at least in terms of risk at the various levels. To wit, it all works just fine. The Buck converter with 70% to 88% efficiency range requires specialized tools and tricks to reach the higher end of this range, for the simple reason it uses the DC inductor for energy storage which is a highly limiting aspect of this topology, and this is no match for a PWM-resonant technology that achieves >98% efficiency with ease, and introduces resonant frequency scaling as a means of trading off inductance size for increased resonant capacitance that reduces size by >80%. The biggest gain besides a radical reduction in footprint and heat due to ferrite-less cores of 10nH air-cored inductances and high capacity minuscule capacitors, is resonance never exceeds a half cycle allowing single cycle control. For example motherboard VRMs requiring 12V to 1V DC-DC step down at output >180 amps requires at least 8 buck phases, to get settling times to below 20 cycles, and what's worse 48V to 1V solutions are now being proposed using GaN MOSFETS switching at 2 MHz, which also require 2% duty cycles with still poor loading reaction settling times. The same problem addressed with PWM-resonance and resonance scaling, keeps the frequency down at 50kHz and still operates with 50% duty cycle with single cycle control, and requires no heat sink, and also eliminates the ever escalating costs of the more sophisticated high frequency ferrite core materials. Engineers are asking the wrong questions based on a topology that is irrelevant to the questions, and whose answers will not be forthcoming if they chase ever high frequencies for eliminating ferrite cores. It is already apparent even 50MHz switching will not achieve that, and there would still be the settling time problem and multiple Bucks in parallel to achieve the necessary power level required of motherboards. .
To my mind it is all a turkey shoot when you look at the differences in outcome, and it is only laziness on the part of engineers who should be demanding the necessary chipsets needed, without incorporating all the unnecessary overhead in the control logic to compensate for poor settling times. The charge to ever higher frequencies is a dead horse - we need an engine to replace the horse. The Buck invented over 60y ago is an inherently low power topology due to the DC inductor, which necessitates parallel phases/channels to achieve even 200W to 300W levels required of motherboards. There is a better way to construct the solution without the debilitating element of the Buck inductor energy storage - gapped magnetics was a bad idea from the start, because as frequencies climb the magnetic core flux densities decrease accordingly for a net ZERO GAIN IN SIZE (and increase in heat which drives the search for better materials).
For myself I champion the elimination of the ferrite cored inductors even at 50 kHz. We only need them for constructing AC transformers not DC air-gapped inductors.
Yes; I agree that the designs for converters are old enough that they are outdated in performance for what we need now.
Scaling design variables allows for easy engineering as far as conceptual design, but it doesn't fix the technological limits of the design itself.
I know for a fact that the energy courses in universities are still teaching buck and boost topologies, which may be why they are being used instead of the PWM resonant circuits.
Laziness and ignorance tend to prevent better approaches to designs and implementations
By no means would I encourage the use of buck and boost converters over the newer technology, but rather the person(s) making the decision for which designs to go with can only make the best decision within their knowledge and constraints