I2S for PSoC4 the I2S_TX_STATSUS0_REG does NOT set the INT flag

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grju_1087506
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I am unable to get the isr to function for the I2S.

Using the "debugger" I can read the register that hold the INT flag (I2S_TX_STATSUS0_REG(CH0) and it will read 0x02 (which means that CHO FIFO is NOT full).    

The data sheet states that the INT flag is the result of a Logical OR of bits 5:0.   If bit 1 is set then bit 7 (INT) should be set.  It is NOT.

Thus.....the isr is never entered.

Why?

I2S component is configured as Stereo, Interleaved,FIFO 0 not full, Bit resolution = Static, Data bits = 16, WS = 32, TX only.

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grju_1087506
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First reply posted First question asked Welcome!

I changed the startup code to load up the FIFO until "NOT FULL" = 0.

For test purposed I changed the configuration of the I2S module to 8 bit resolution and 16bit Word period, then inside the ISR wrote out a byte for the LEFT, then a byte for the RIGHT  using

/* Write data for the left side */
I2S_AUDIO_WriteByte(VaporTrailData[SoundFileByteCount], 1);
SoundFileByteCount++;

/* Write data for the right side */
I2S_AUDIO_WriteByte(VaporTrailData[SoundFileByteCount], 0);
SoundFileByteCount++;

None of these changes helped.   It will go into the ISR once...then no more even though

volatile uint8_t check_the_ISR_status = isr_I2S_GetState();  ( = 0x01 means INT is set)

volatile uint8_t ch0_status = I2S_AUDIO_ReadTxStatus(); (0x02 means FIFO is NOT FULL)

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