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ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

In a test to see if I could route a  64 channel analog mux into a SAR I picked up on

an error associate with mux. It reported, as shown, only 5 address bits, but errored

when I gave it a 5 bit buss. Whn I gave it 6 bit buss it stopped complaing, but you can

see in symbol its still reporting only 5 bits needed.

 

ETRO_SSN583_0-1626282445800.png

 

 

Regards, Dana.

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5 Replies
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

Dana,

a 64 input mux = 2^6.  Hence 6-bits of the counter is needed not 5.

Len
"Engineering is an Art. The Art of Compromise."
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ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

Yes, but tool is showing buss width at mux is only 5 bits, thats the error, the label

the tool shows. See circled label on the screenshot I posted.

 

Regards, Dana.

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Dana,

You are correct.  It is a limitation of the AmuxHW component.

I imported the AMuxHW component into a project.

I opened the "AMuxHw_v1_50.cysym" file.

Len_CONSULTRON_1-1626311661094.png

I select the "2" highlighted above.

The field came up:

`=($Mode == MuxMode)?(($Channels <= 2)? 1 : (($Channels <= 4)? 2:(($Channels <=8)?3:(($Channels <= 16)?4:5)))):($Channels)`

Based on the above equation, any number of Channels > 16 is treated as 2^5.  There "5" is the largest "n" factor in 2^n.

This might only be a user feedback/visual issue.  The actual feeding of a 6-bit bus (2^6) on a 64-bit mux might still work fine.

Someone would have to code review the ".v" (Verilog) file to determine if there would be a problem.

Update

I've modified the AMuxHW_v1_50 to AMuxHW_v1_51 where the bus width is increased to now support upto 128 Amux inputs (@ 7-bit bus width).

Just unarc the zip file attached into your project directory.  It should show up on the Component Catalog.

 

Len
"Engineering is an Art. The Art of Compromise."
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MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

It would be nice, if you can tell us which device and component you are using.

This time, I assumed a PSoC 4 and the component is Analog Hardware Mux.

At first I tried a 2-input Amux and it seems to be OK.

002-AMux_2.JPG

Then I tried a 16-input Amux and it seems to be OK.

003-AMux_16.JPG

Then I tried a 32-input Amux and it seems to be OK.

So far, so good 😉

004-AMux_32.JPG

Then I tried a 36-input Amux, this should require 6-bit for selector bus.

But it still shows 5!  This could be a bug at this point.

005-AMux_36.JPG

Then I tried 64-input, which also should require 6-bit selector bus. 

And I think that this is your case, too.

006-AMux_64.JPG

Then I went 128-input, which should require 7-bit selector bus.

001-Amux_128.JPG

Finally the maximum number of inputs, which is 256, 

and the selector bus should be 8-bit

007-Amux_256.JPG

So what I observed is that the bit-width of the selector bus in the Analog Hardware Mux

with more than 32-input is incorrect.

I would call it a bug, if I may.

I hope that  Infineon (Cypress) will fix this soon 😉

moto

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Hello,

We have forwarded your query to our internal team, who will evaluate your query.
We will provide a response as soon as we get an update from our internal team.
Thank you for your patience.

Thanks and Regards,
P Yugandhar

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