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I am new to psoc1. Thought there might be a way to do some custom logic in a digital block but it seems that you can only modify existing modules? I need a simple clock recovery circuit for synchronous data but looking around I do not see anything that does what I want. I have a circuit which uses 2 flip flops to clock a rising edge or falling edge and then triggers a counter (that resets at TC) giving me a clock. The incoming data is NRZ and an edge determines a 0 and no edge means 1. It has transparency (insert 0 after 5 consecutive 1's). I can bit bang this but it would be nice if I could get a clock. Be nicer if I could get the transparency as well.
Any help is greatly appreciated!
Keith
Solved! Go to Solution.
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There is a 3.5 x 3.9 package in the BLE family of parts.
Regards, Dana.
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Are you using PSOC 1 or 3/4/5LP ? The latter allows you to do it in drawn logic
or to do it with verilog.
A discussion here with some ref material -
http://www.cypress.com/forum/psoc-5-architecture/clock-recovery-receive-nrz-nrzi-design
Regards, Dana.
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Some design material on state machine creation.
http://www.cypress.com/?rID=44402 AN62510 - Implementing State Machines with PSoC® 3, PSoC 4, and PSoC 5LP
http://www.cypress.com/?rID=52365 State machines using LUTs Video
Regards, Dana.
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Thank you Dana for the references. I am using a psoc1 because it is the only device that fits in the space I have (3mm x 3mm). But I will attempt to figure out how to do the state machine in the psoc 1. Any examples would be great if anyone has any.
thanks,
keith
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I think you need a HW state machine, which PSOC 1 does not have. Here are
SW state machine references -
Regards, Dana.
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There is a 3.5 x 3.9 package in the BLE family of parts.
Regards, Dana.