PSoC™ Creator & Designer Forum Discussions

If I config SAR for Vref, external bypassed, that commits P1_7 as a pin

on pioneer board. But no pin icon is shown on schematic.

If I then place a pin, config it as analog, P1_7, will that enable me to route

the Vref on the pin internally to other analog, like a OpAmp or comparator ?

Does that still satisfy the SAR Vref route to the pin ?

Regards, Dana.

1. i would like to know if a Size check is preformed before a new image can be uploaded via Bootloader. that is, bootloader validate if there is enough space in app slot while receiving image data.

2. is there a build-in method to encrypt image and then upload it to PSoC?

 I tried creating a project for the CY8C6245 processor on PSOC Creator 4.4.

  It is not in the list of allowable processors.  The PSOC 62 processor version  246 and 247 parts are there, but not the 245.

  What can I download to support the CY8C6245 on PSOC Creator?

I've been experimenting with the PSOC 6 BLE Pioneer kit to come up to speed on Cypress parts and the PSOC Creator IDE. I read that the chip has a floating point unit, and I was searching through the options in the IDE to see how to enable floating point operations in hardware (but didn't find anything). I searched the forum and came across a post from a few years ago that outlined a manual process for setting the compiler flags and linking the libraries, but it seemed somewhat involved and not user friendly. I wanted to know if this issue has been addressed in the latest version of PSOC creator 4.4, and if so, how do I access it? If it hasn't been addressed, I would assume that enabling the FPU is discouraged for some reason. Are there library compatibility issues I should be aware of? In a worst-case scenario, are there intrinsic functions available to access the FPU instructions?

Hello

We are developing DMC software on PSoC Creator.

We have two kind of SDKs, so I'd like to have one. When porting FW, I think the related files are as follows.
・ .Cydwr
・ TopDesign.cysch
・ xxx.c, xxx.h

Please let me know if there are any files other than the above that I  should be careful about when porting.

Best Regards

Arai

Hi All,

I am creating a new design variant of a working project targeted for the 222014-01 BLE module by copying a working project that was targeted for the 222005 module, changing its name and using Device Selector to choose the new module type.

After doing this, I get three errors during the fitting stage:

To make matters worse, I've seen this error before but I cannot remember how I fixed it.  I have tried updating the components (BLE was updated to 3.66 and cy_boot to 5.90), but this hasn't eliminated the errors.

The error message suggests how to fix the problem but I can't find where one sets the "User provided" option.

Thanks,

Scott

Hi, 

is there a dark theme option in PSoC creator?

if yes, how can I enable it?

if no, is there a timetable for that?

it would help the developers community greatly.

I'm trying to use the ShiftReg 2.30 component in the schematic editor.   I'm looking for a output "pin" to tell me if the input FIFO is empty, so I can stall the clock, at least that's how I'm thinking about it.   

The datasheet has a statement saying The Load operation has the hardware restriction that the load event can be provided only when input FIFO is not empty.   It seems unclear to me what happens if the Load input is asserted when the FIFO is empty.   

Since the only output other then ShiftOut is the Interrupt signal, I'm guessing that might be it, but I'm looking to use it in additional UDB logic, rather than feeding it to the interrupt controller.    Can anyone provide more guidance, or a working example link.   

Note: An earlier form posting related to using DMA with ShiftReg seems like it might be relevant, but the link to it seems broken.