PSoC Creator & Designer Software

hi,

i found  a problem  using the rx hw fifo buffer,

if i read a byte from the fifo and in that exact time anew byte is recived the data i read i corrupted.

is there any way to read the fifo without that problem?

thanks.

Hi all,

I recently started working with a PSoC 6 development kit (CY8CPROTO-063-BLE). As I was familiar with PSoC Creator for PSoC 5LP, I started developing simple projects targeted to PSoC 6 devices using PSoC Creator 4.4.

The problem is that the build and programming steps are painfully slow on my machine, while being very fast when using PSoC 5LP as target device. Do any of you know what could be the cause of this behaviour?

Here are the specs for my machine:

- MacBook Pro: dual-core 3.1 GHz Intel Core i7, 8 GB RAM

- Windows 10 VM running on Parallels with dual-core, 3 GB RAM

Thanks,

Davide

I have a project with a Cy8C4013SXI-420. This is a SO8 part.

I have the programming configuration as:

1.6MHz (also tried slower)
3.3V
Power Cycle Mode
5 Pin Header
SWD

I have the following wires connected from the MiniProg3 to my target board:
VTARG to my 3.3V rail (PSoC supply). No other power applied to the board. There is no other significant load on this rail, maybe 30mA.
GND to GND of course
SCLK to PSoC pin 1 (P3_1)
SDAT to PSoC pin 8 (P3_0)

The programmer cannot connect. It takes a long time, like 30 seconds, then shows the target as "Cortex-M0", but won't connect. Sometimes it doesn't even show that.

Put a scope on VTARG and it is slowly cycling on and off to 3.3V.

I have changed the chip, same result.

I have had similar issues with the standard 5 pin programming interface before, but only when I have needed to put wires to extend the programming interface. I have found that it will NOT detect the target if those wires are more than maybe 2" long. So in this case, because I have wires, they are about 1 inch long.

Anyone have a solution for this?

Thanks in advance -

I have 1 CY8CKIT-050  and 2 CY8CKIT-030 boards, all no longer CPU supported

by Creator. Do you folks have a service that can update CPU on the board to

latest rev for a fee ?

Tossing these boards would be a sin and an act against engineering humanity 🙂

Regards, Dana.

Hello

I see what may be a conflict in the Fan Controller datasheet where manual mode seems to suggest only the ability to use the PWM Duty cycle API and there is no response to fan speed, but a graphic further down in the sheet seems to imply that the desired fan speed API can be used in manual mode.

So I really need a clarification, before I start writing code.

Thanks

Is there a way to go through the whole workspace and find these types of errors/warnings that appear on the left side?

Or just list them in the same way the Notice List does, where I can double-click to go to the location in the code?

The project builds and doesn't show anything about these in the Notice List, but I'd like to be able to get them all sorted out, to make sure there are no subtle bugs, etc.

Customer application where he is relying on ARM when power off GPIO will be in HiZ state.

Two cases to this to consider, Power disconnected (switch opens to PSOC Vdd) or power collapses,

such as in a transformer fed simple bridge > regulator PSOC, where PSOC power pin is always "in circuit,

connected".

Ap notes do not discuss this. I stated to customer than when Vdd drops below its min datasheet spec  value

all bets are off as to what a GPIO pin looks like. That there is possible charge trapping inside device driving gate 

that would have to bleed off to make sure a device, in this case the NMOS side of totem pole, and that could take a 

long time.

Question, what is the state of a GPIO pin, and can it be controlled, pre destined, when Vdd drops below operating

datasheet spec value ? I think answer is NO !

Regards, Dana.

Hi, the blog info, which was quite useful, seems to have been removed.

Would it be possible to create a HTML file of all the content for users to access or download ?

https://www.cypress.com/blog/psoc-sensei-blog

Regards, Dana.