PSoC™ Creator & Designer Forum Discussions

Hi,

I would like to know if it is possible to connect a 16-bit wide bus to two 8-bit wide buses.

If yes, then how?

Attached is a picture which shows what I want to connect.

Thanks,

Mark

Hi all,

I just want to play with psoc CY8CKIT - 148 Board with PSoC 4700 on it, but neither the board nor the PSoC are selectable in PSoC Creator Ver. 4.2. The software package "CE222867_MagSense_With_Feedback_LEDs" doesn't work also. There is a message: " the software package was created with older device..." or so.

How can I update my PSoC Creator to be able to work with PSoC 4700?

I recently encountered what looks like either a bug in the compiler or the generated code from PSoC Creator 4.0 (on a CY8C4124PVI-432).

As far as I know, I'm using the latest version of all the tools.

The bug is this:

I've defined a pin as a GPIO Input.

If I call CyPins_ReadPin(alias) then the generated code executes an extra "ldr r3,[r3]" - which usually causes an exception.

If I call alias_Read(), it works as expected.

I've attached an Archive of a sample project that demonstrates the problem.

If you look at the main.lst file, you'll see the following generated code:

29:main.c        ****     dummy = CyPins_ReadPin(Pin_1);   61              .loc 1 29 0   62 0024 0B4B      ldr r3, .L3+4   63 0026 1B68      ldr r3, [r3]   64 0028 1B68      ldr r3, [r3]     <--- extra instruction!

Meanwhile, the good code looks like this:

138:Generated_Source\PSoC4/Pin_1.c ****     return (uint8)((Pin_1_PS & Pin_1_MASK) >> Pin_1_SHIFT); 142              .loc 1 138 0 143 0004 044B      ldr r3, .L9 144 0006 1B68      ldr r3, [r3]     <--- only one "ldr" here

Is this a known problem?

Whenever I try to answer a post, the forum refuses to post my answer.  I can only start discussions, not participate in them.  Why?

I 've got CY8CKit - 149 and I tried Build by downloading "CE 220891 Capsens_with_Breathing_LED" from Code Example, but it does not work because I made a Build Failed.

The following error appears in the Notice List window.

”Build error: Hex file generation step failed, see output window for more information.”

Looking at the Output Window, I do not know where the problem is. Please tell me about the solution.

I tried reinstalling PSoc Creator etc, but there is no change in symptoms.

I am hoping someone can help with this issue

I had rebuilt the design many times over several days as I updated the TopDesign and main.c

It was working as expected and I could build and down load to the cy8ckit-049-42xx with no issues

Changes made to the pwm are verifiable on the o-scope

Then

During a build both *.hex and *.elf files are deleted or gone

I cannot set the file paths on the dependency page as the files do not exist now

The path does not exist. per the errors

I have searched the entire drive to see if maybe they were put somewhere else but none found

Getting the following errors

error 1

pft.M0086:

Error in component: Bootloadable. The referenced Bootloader is invalid. Verify the Bootloader dependency is correct in the Bootloadable Component, then build project. Invalid bootloader hex file. Unable to read the hex file (C:\Users\Ron\Desktop\0 - ELECTRONICS\XXXXXXXX\TS_Tester\TS_Tester\My_TS_Tester.cydsn). The path does not exist.

Error2

ft.M0086:

Error in component: Bootloadable. The referenced Bootloader is invalid. Verify the Bootloader dependency is correct in the Bootloadable Component, then build project. Invalid bootloader elf file. Unable to read the elf file (C:\Users\Ron\Desktop\0 - ELECTRONICS\XXXXXXXXXX\TS_Tester\TS_Tester\My_TS_Tester.cydsn). The path does not exist.

Error3

fit.M0050:

The fitter aborted due to errors, please address all errors and rebuild.

This happened to me a couple of times in the past

The only way to get the files back is to delete the TopDesign and start over with a blank TopDesign

Comment out all the main.c changes made

Place a new Bootloadable component on the TopDesign Page

What could be suppressing the making of the *.hex and *.elf files?

Using Creator 4.2

Resources used:

digital clocks 2/4

interrupts 3/32

i/o 7/36

timer counter 3/4

udb 100%

     macro cells 10/32

     p terms 10/64

     data path 4/4

     status cells 2/4

     control cells 2/4

My program compiles with optimization.  But when I turn optimization off in Project->Build Settings->Synthesis Optimization Effort, the program fails to compile.  The error message is "Routing of net __ZERO__ Failed."

Why can't I turn optimization off?

Please, can you publish how to download cy_boot version 5.80 marked as "downloadable"?

Many thanks,

Viktor

    i  have to say something terrible issue form creator 3.3 to creator 4.2,

   For part#,  i can't download the hex file with creator4.2, but it's ok in creator3.3;

          2、when we used posc4 part, it's better used in creator3.3, otherwise i may can;t download the hex into you chip;

          3、the miniprog3 dowload issue is terrible, i takes too many time in it, it's very strict to download the hex, it must to keey the concent without any little trouble or the lines can;t be to long,  so i don't understand why don't you make it easy for development engineer,

         4、for the creator4.2, when we use psoc400 with capsense 4.0 it may not work or something mistake in download part, so it waster time to do test;

         5、now we can't find creator3.3 ide, may be it function is not power to creator4.2, but it stably , please help to solve it,???????