Up/Down accumulator for a type 2 phase detector (PLL)

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RiTa_288331
Level 2
Level 2
10 replies posted 10 questions asked 5 replies posted

Greetings all!

I'm trying to make a type 2 phase detector for a PLL circuit (see attachment).  In this PLL, the VCO is external, and the PSOC will control it by a single control voltage through the VDAC (but it could also be a PWM).

I'm looking for a kind of "accumulator", or up/down counter, that will control the VDAC's output voltage.  Normally, lines Qa and Qb are both low (this represents a locked phase condition, which is what we ultimately want).

--> I want a condition, where:

     if there are pulses on the Qa line, then VDAC should increase its output.

     if there are pulses on the Qb line, then VDAC should decrease its output

     if there are no pulses, then VDAC should keep using its "last" value

Is there such an accumulator/counter in PSOC?  I see counters, but I don't see an up/down counter.

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I have 60Hz type-2 analog PLL all made inside PSoC (plus a couple of capacitors and resistors). I believe  that generating quadrature sine outputs is also feasible within PSoC chip. Attached are type-II phase-frequency detector (PFD), loaded to RC filter. The output of the filter directed to a VCO (using Delta-Sigma Modulator inside the PSoC). It was tested and locks in approx. 30-150Hz range. I will dust-of the PLL demo project and post it. Meanwhile attached are screenshots from the project. The filter is most tricky part of PLL, as those combinations of Caps and Resistors are designed to provide a "phase margin" (aka friction) in the loop - otherwise loop will not settle and continue to oscillate around lock frequency.

Phase-Frequency_detector_type_2_01.png

Analog_Low-Pass_Filter_01.png

VCO_DelSig_modulator_01.png

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