UART build error: "Bad value for formal 'sync_mode'. Must be a constant"

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Kratje
Level 1
Level 1
First like received First reply posted First question asked

Hi guys,

I'm making a matrix-based wireless MIDI keyboard for a uni project and the final hurdle seems to be an error PSoC Creator 4.4 gives when I try to build my project. It's already stated in the title, but here it is again:

Bad value for formal 'sync_mode'. Must be a constant

The line this refers to, however, is in the official PSoC UART peripheral block, which for obvious reasons I shouldn't be asked to edit.

Attached are a screenshot of my TopDesign, my main.c and the line that causes the error. Does anyone know what causes this?

Thanks in advance!

 

My main.c:

 

/* ========================================
 *
 * Copyright YOUR COMPANY, THE YEAR
 * All Rights Reserved
 * UNPUBLISHED, LICENSED SOFTWARE.
 *
 * CONFIDENTIAL AND PROPRIETARY INFORMATION
 * WHICH IS THE PROPERTY OF your company.
 *
 * ========================================
*/
#include "project.h"

void setup(void){
    scannerPWM_Start();
    UART_1_Start();
}

int main(void)
{
    CyGlobalIntEnable; /* Enable global interrupts. */'CY8C5888LTI-LP097
    /* Place your initialization/startup code here (e.g. MyInst_Start()) */
    setup();

    for(;;)
    { 
        /* Place your application code here. */
    }
}

//interrupt to send midi
CY_ISR(tx_go){
    UART_1_PutChar(Status_Byte_Read() );
    UART_1_PutChar(Note_ID_Read() );
    UART_1_PutChar(Velociy_Data_Read() );
}

/* [] END OF FILE */

 

 

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1 Solution
MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

Your "error.png" seems to suggest that the defined value "TRUE" has been defined not as a constant.

As far as I tried to trace, in cy_psoc3_inc.v, TRUE was defined as

`define TRUE 1

But may be you have another definition of "TRUE" in your project, which could cause the error.

If it's not the case, I can not think of a good reason.

Posting your project or a minimum project which can reproduce the error could help others to find the cause.

moto

View solution in original post

2 Replies
MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

Your "error.png" seems to suggest that the defined value "TRUE" has been defined not as a constant.

As far as I tried to trace, in cy_psoc3_inc.v, TRUE was defined as

`define TRUE 1

But may be you have another definition of "TRUE" in your project, which could cause the error.

If it's not the case, I can not think of a good reason.

Posting your project or a minimum project which can reproduce the error could help others to find the cause.

moto

Kratje
Level 1
Level 1
First like received First reply posted First question asked

Hi moto,

Thank you so much! You were completely right. My VHDL to Verilog translator had inserted a few lines at the top that defined 'TRUE' and 'true' as binary values for whatever reason (it didn't even use them in the generated verilog).