SPI last bit corruption

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Anonymous
Not applicable

I have a problem on communication by SPI.

   

I observe the following behavoir: the transmission is OK when I send 2 bytes together, but when I send them one by one the last bit of the first byte is corrupted. There is a source code:

   

    uint8_t reg1 = 0x25;

   

    uint8_t Value = 0;

   

 

   

    SS_1_Write(0);

   

 

   

    // Write reg (reg1, value = 0x10)

   

    SPIM_1_WriteTxData(reg1 & 0x7F);

   

    SPIM_1_WriteTxData(0x10);

   

    while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)

   

        ;

   

    Value = SPIM_1_ReadRxData();    // dummy read to remove byte from buffer

   

    while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)

   

        ;    

   

    Value = SPIM_1_ReadRxData();            // dummy read to remove byte from buffer

   

    

   

    SS_1_Write(1);

   

    SS_1_Write(0);    

   

    

   

    // Read reg back

   

SPIM_1_WriteTxData(reg1 | 0x80);

   

SPIM_1_WriteTxData(0xFF); // dummy write to synchronize

   

while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)

   

;

   

Value = SPIM_1_ReadRxData(); // dummy read to remove byte from buffer

   

while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)

   

;

   

Value = SPIM_1_ReadRxData();     // readen reg value

   

    

   

    SS_1_Write(1);

   

 

   

This code works fine. But when I move SPIM_1_WriteTxData(0xFF) in register value reading to place after reading dummy byte I receive wrong value:

   

    // Read reg back

   

SPIM_1_WriteTxData(reg1 | 0x80);

   

while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)

   

;

   

Value = SPIM_1_ReadRxData(); // dummy read to remove byte from buffer

   

SPIM_1_WriteTxData(0xFF); // dummy write to synchronize

   

while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)

   

;

   

Value = SPIM_1_ReadRxData();     // readen reg value is WRONG

   

 

   

Then after some actions I found that the readen value is equal to value from register with address (reg1 - 1). This behavoir repeats for other register pairs.

   

 

   

Why does this happen?

   

 

   

I have configured SPIM component for mode (CPHA = 1, CPOL = 1), 8 Data Bits, MSB First. The external clock frequency is 2MHz. SS-pin is controlled by software.

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2 Replies
Anonymous
Not applicable

Hi Olga,

   

 

   

If you are still facing this issue, can you please attach oscilloscope screenshots of the 4 SPI lines (MOSI, MISO, SCLK, SS) for both the passing(2 bytes together) and failing(byte-by-byte) conditions, and attach the PSoC Creator project if possible ? Also, please confirm if the SPI slave also operates in Mode 3(CPHA = 1, CPOL = 1).

   

 

   

Thanks & Regards,

   

Prem Sai

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ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

When you attach the project use IE or Firefox, Chrome

   

has issues.

   

 

   

For a cheap and dirty logic analyzer, I bought 2, work great.

   

 

   

    

   

          http://www.ebay.com/itm/Compatible-with-Saleae-USB-Logic-24MHz-8Ch-Logic-Analyzer-Supports-1-1-15-US...

   

 

   

Regards, Dana.

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