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PSoC Creator & Designer Software

Anonymous
Not applicable

 How I can change state (0 to 1), a pin on PSoC Creator?

   

I'm trying to make an application for an SPI master in a PSoC5 using the component provided by PSoC Creator. The device that I'm using as SPI slave, is a chip of reference ADS1298 from TI.

   

To complete the implementation of SPI communication, between PSoC5 and ADS1298, I need to put 3 pins that correspond to outputs digitals in PSoC Creator. The pins are: "Power_Down", "Reset" and "Start", these pins are normally 0, but after some delays programmed for each of them must change state to 1. How do I do it?

   

Hope you can help me, is urgent...

   

Thank you very much

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1 Solution
Honored Contributor II

You can connect your pins to a timer component. This allows you to change them automatically after a certain delay.

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5 Replies
Esteemed Contributor

Several approaches, depends on what the timing, logic of the stimulus for these

   
   

pins. That being said consider a LUT in creator to sequence these pins. The LUT

   
   

can be registered, hence turn into a state machine, options on # inputs and outputs,

   
   

clocking. Fairly flexible. Sometimes 2 LUTs can solve most problems.

   
   

 

   
   

http://www.cypress.com/?docID=32550

   
   

 

   
   

Regards, Dana.

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Honored Contributor II

You can connect your pins to a timer component. This allows you to change them automatically after a certain delay.

View solution in original post

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Esteemed Contributor II

And if the delays are in the range of ms you can use a control-register and set/clear them individually at delays derived with one of the CyDelay-functions (to be found in System Reference Guide).

   

Bob

   

Another 5 solutions for one problem? Not yet really, but we approach...

Anonymous
Not applicable

Thank you all... I used "Pin_Write(uint8 value)" function and I could solve my problem.

   

Regards,

   

Jeisson Andrés

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Esteemed Contributor

The CyDelay()'s are software timing loops, where processor gets tied

   

up doing nothing else (except ISR servicing). If thats not objectionable

   

then this is very HW efficient, being a software loop.

   

 

   

If thats a problem the other solutions all work equally well, with some having

   

lower HW resource impact than others.

   

 

   

Regards, Dana.