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PSoC Creator & Designer Software

New Contributor II

PSoC Creator4.2 vs.PSoC 4 Capacitive Sensing (CapSense®) page28

PSoC 4000S/PSoC 4100S/PSoC 4100S Plus/PSoC Analog Coprocessor: 48000 kHz or HFCLK, whichever is lower.

How ever PSoC Creator4.2 is Max 24000

How to set up  48000 kHz?

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1 Solution
Moderator
Moderator

Hi

The reason PSoC creator limits the modulator clock frequency to 24000 kHz in this case is because the HFCLK is limited to 24 MHz within the design.

If you require 48000kHz clock modulator clock frequency, please select the Clocks tab in the Design Wide Resources, click on Edit Clock option.

pastedImage_0.png

pastedImage_1.png

Here you can set the HFCLK frequency to 48MHz by choosing IMO as the source and changing the divider to 1.

pastedImage_3.png

I've attached screenshots for your reference. Once you set the HFCLK to 48MHz, the option for 48000kHz in modulator clock frequency should be active.

Please follow these steps and let us know if you were able to select 48000 kHz as modulator clock frequency.

Thanks and regards

Hari

View solution in original post

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10 Replies
Moderator
Moderator

Hi

The reason PSoC creator limits the modulator clock frequency to 24000 kHz in this case is because the HFCLK is limited to 24 MHz within the design.

If you require 48000kHz clock modulator clock frequency, please select the Clocks tab in the Design Wide Resources, click on Edit Clock option.

pastedImage_0.png

pastedImage_1.png

Here you can set the HFCLK frequency to 48MHz by choosing IMO as the source and changing the divider to 1.

pastedImage_3.png

I've attached screenshots for your reference. Once you set the HFCLK to 48MHz, the option for 48000kHz in modulator clock frequency should be active.

Please follow these steps and let us know if you were able to select 48000 kHz as modulator clock frequency.

Thanks and regards

Hari

View solution in original post

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New Contributor II

Hello

Thank you for your reply.

I did it..

Thank you very much.

K,Miyake

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New Contributor II

Hello

This is K,Miyake

I did according to cypress Cap Sense manual that is frequency 48000kHc Tx clock 1000kHz

However this result was no good

Signal Level is smaller than noise level

This frequency is too high ? Right?

I attached pad Spec. Could you please give me your opinion.

Thank you

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Moderator
Moderator

Hi

Could you please attach your project so that we can take a look?

You can find the details of archiving a project in this link :

https://community.cypress.com/docs/DOC-9742

Thanks and regards

Hari

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New Contributor II

Hello

Thank you for your help.

I attached file.

Thank you

K,Miyake

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New Contributor II

Hello

I ask you another problem that

If Tx frequency change to 100kHz, I can get signal level that higher than raw noise counts.

However I check signal level , Rx0 and Rx4 are same level so I can not find coordinate position

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Moderator
Moderator

Hi

I'm attaching the project with few changes to the CapSense component. Please try it out and let us know if it works.

I have enabled the IIR filter in General tab under advanced tab of properties.

Under widget details, i have set the finger threshold to 300 and number of sub-conversions to 500.

Please do try it and let us know if it works

Thanks and regards

Hari

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Moderator
Moderator

Hello

Did you try the program attached above? Is it working in your case?

Regards

Hari

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New Contributor II

Hello

I changed

1. Unused Pad Line which connected to GND to open

2. Modulator clock frequency(kHz) 48000

3. Enable common Tx clock 1000 not 3000:Manual recommendation

4. Number of sub -conversions 200 not 500

* RAW Count 3500 touch finger 4500 count

Thank you for your help

K,Miyake

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New Contributor II

Method

CSX Multi-cap

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