PSoC™ 6 Forum Discussions
Hi
Using the sample code to program a PSOC6, I found that the code programs three different flash types; main, working, and supervisory flash.
First of all, I could not find a definition of these memories (I am a novice in this field). Could you refer me to the right resources describing definitions?
Secondly, Do I have to program all three memories? My code which is a Blinky LED runs fine with just programming the Main Flash.
Thank you
Show LessHi ,
In order to support FAT on uSD, we can use emfile driver.
However, I met a problem that I can’t use QSPI HAL to init SPI rom successfully after using emfile for uSD only.
I’m not sure if it’s a driver limitation or config setting problem.
Could you help on that to use emFile for uSD and SPI access at the same time?
Regards,
Kyle
Show LessHello,
I have seen that in many projects for the PSoC62 the startup code for the cm0+ copies the vector table into SRAM, no matter what.
Is there an example that shows how to keep that table in its original position in FLASH?
Show LessHi I am trying to program my CY8C6347FMI-BLD43 over jtag with miniprog4 and seem to be having some issues. Is there any step by step or guide I could follow? any tips would be great.
Show LessHi,
I have a project that was created in Modutoolbox 2.1 and I need to use it in modus toolbox 3. I am trying to follow the steps provided in the document KBA236134. In step number 3.1 mentions that is necessary to create a new workspace and in step number 3.2 says to move the existing application to the workspace. after following the document, the document mentions in step 3.3 to add the BSP. When opening the library manager and choosing the app in the application directory says error, the application uses an older build flow. My question here is, Do I have to create a new "empty project in my workspace", add all the source and header files, and then proceed with step number 3.3? As additional information the BSP original project was created for the CY8CPROTO-063-BLE and the new project is also going to be working on the CY8CPROTO-063-BLE evk board.
My second question is if the libraries that I add from the Library manager go to the mtb_shared folder. Because, in my older project all my libraries are located in the lib folder, and the document says in step 3.2 to delete that folder. Should I move them before deleting them to the mtb_shared folder? I have to mention that not all the libraries that I am using are available through the library manager. What should I do there?
If you need more details about my issue, let me know. Thanks in advance!
Regards,
Luis Flores
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hi @LeoMathews
You originally helped me on a topic that I closed is there a dual core IPC message pipe example for ModusToolbox 3.0?
Well you suggested that I had to migrate the example to MTB3.0. Which I tried and attempted to following the KBA mentioned below.. I also have a topic opened in the ModusToolbox-General forum , but not getting help.
but I wanted to communicate with you because you suggested migration and you might be more informed on what I'm trying to do. Hopefully you can tell why I'm getting this error? What Am I doing wrong?
Basically, I am following the knowledge base article KBA236134 to migrate a Github dual core example using IPC pipes, I am having a problem on "Step 6: Import the application" in the article. all the other 5 steps went ok, but I cannot import the application using the Import Existing Application In-Place link in the Quick Panel of the in Eclipse IDE for ModusToolbox.
I'm following this KBA article from October 06,2022 at KBA: Migrating ModusToolbox applications from version 2.x to version 3.x – KBA236134
I am trying to migrate the GitHub - Infineon/mtb-example-psoc6-dual-cpu-ipc-pipes on the Infineon repo.
my PROBLEM is I received an error as follows
Here is a screenshot of the error dialog. HOPEFULLY the image shows up, if not see attachments. (not showing up for me?)
the error in the console:
Import scheduled. As projects are imported, they will appear in Project Explorer.
Problem creating subproject mtb-example-psoc6-dual-cpu-ipc-pipes-master: Error while executing the "Dual-CPU_Empty_PSoC6_App" operation
Problem creating project at C:\CY8_psoc6\WP_MIGRATION2\mtb-example-psoc6-dual-cpu-ipc-pipes-master
Problem getting project description for app_cm0p
Problem getting project description for app_cm4
Here is a screenshot of the console with the error
If you need any more information please let me know.
Regards Steve K
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Hi all,
How to use 2 CYPRESS Miniprog4 devices in One PC to Program 2 IC at the same time?
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I didn't find any parameters in the burner that could tell the hardware apart
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If so, how do I do it?Thanks!
Hi,
I'm trying to make Wi-Fi enterprise connection with TP-LINK router using radius server but, while connecting I'm getting error as MBEDTLS_SSL_ALERT_MSG_BAD_CERT at the time of parsing server certificate.
Same scenario I tested with Cisco router then there is no error. Able to connect successfully.
FYI: Using CYW43455 chip as Wi-Fi module
TP-link model no: Archer MR200
Cisco Model no: Linksys E900
Thanks
Show LessHi,
I'm working with a customer that needs the I3C protocol on the PSoC device, looking this old thread seems Infineon was studying the feasibility to implement it on newer products, so my questions are:
1 - Is there any planned device on the near roadmap with I3C?
2 - If not, is it possible to implement using the UDB (Universal Digital Block) or is it possible to implement using the cortex M0 to be dedicated to emulate the I3C?
Thanks in advance,
Marcelo - Neutronics FAE
Show LessIm using a PSOC6 + Micron 2Gb QSPI NAND flash MTMT29F2G01xxxxxxx 8 pin device.
Micron support has been basically a black hole so thought I would ask here even though its not directly - I don't think - related to the PSOC6 QSPI...but I'm getting desperate ...
I created the NAND flash driver from some MTB NOR flash driver code with the cyhal_qspi... stuff plus other GitHub NAND flash driver code that is really old..2011 I think but..(ok so..why didn't i just use that one?? it would have required a fair amount of re-work and essentially my driver is almost the same now anyways, in case you were wondering)
Quickie...there are 2048 blocks of 64 pages in the NAND flash.
I entirely erase the flash to FF's at the start of main()...
When I write to any page in a block with an even block number , I can read it back correctly AND when I read +/- ANY number of pages from that one, I get FF's like I should expect (since its entirely erased)
When I write to any page in a block with an odd number AND not on a N*64 boundary (eg: block# 3 page 193), I can read the page back correctly BUT when I read +/- ANY number of pages from that one, *I get the SAME values I wrote to the original page*
QSPI at 25 MHz, I have a logic analyzer that shows the traces and all timing / transactions look perfect..
Its as if the "someone" is caching the pages written to odd addresses and just giving them back to me no matter what.
But like I said if the original page is written to an even block number everything else returns FF's like it should.
Anybody have a suggestion??? Also if its not pertinent to this forum feel free to trash this I can try others.
thanks
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