PSoC™ 6 Forum Discussions
text.format{('custom.tabs.no.results')}
I'm running SPI with DMA like this:
I'm transferring blocks of 512 bytes (reading and writing to SD card), and sometimes I don't care about the transmitted data and sometimes I don't care about the received data. (Similar to how the High-Level SCB SPI function Cy_SCB_SPI_Transfer() is used.)
This solution works:
bool sd_spi_transfer(sd_card_t *this, const uint8_t *tx, uint8_t *rx, size_t length) {
uint8_t dummy[512];
if (!tx) {
memset(dummy, 0xFF, length);
tx = &dummy[0];
}
if (!rx) {
rx = &dummy[0];
}
//...
/*Set up SRC addr for TX DMA*/
Cy_DMA_Descriptor_SetSrcAddress(this->txDma_Descriptor_1, tx);
/*Set up DEST addr for RX DMA*/
Cy_DMA_Descriptor_SetDstAddress(this->rxDma_Descriptor_1, rx);
/*Enable DMA_channels*/
Cy_DMA_Channel_Enable(this->rxDma_base, this->rxDma_channel);
Cy_DMA_Channel_Enable(this->txDma_base, this->txDma_channel);
I thought I'd try to optimize away the useless 512 byte buffer, like so:
spi_dma_transfer(spi_t *this, uint16 len, const uint8_t *txBuffer, uint8_t *rxBuffer) {
uint8_t dummy = 0xFF;
if (!txBuffer) {
txBuffer = &dummy;
}
if (!rxBuffer) {
rxBuffer = &dummy;
}
/*Set up SRC addr for TX DMA*/
Cy_DMA_Descriptor_SetSrcAddress(this->txDma_Descriptor_1, txBuffer);
/*Set up DEST addr for RX DMA*/
Cy_DMA_Descriptor_SetDstAddress(this->rxDma_Descriptor_1, rxBuffer);
/* Use 256 X loops and 2 Y loops */
/*Set up RX Descriptor 1*/
Cy_DMA_Descriptor_SetXloopSrcIncrement(this->rxDma_Descriptor_1, 0);
if (&dummy == rxBuffer)
Cy_DMA_Descriptor_SetXloopDstIncrement(this->rxDma_Descriptor_1, 0);
else
Cy_DMA_Descriptor_SetXloopDstIncrement(this->rxDma_Descriptor_1, 1);
Cy_DMA_Descriptor_SetXloopDataCount(this->rxDma_Descriptor_1, 256);
Cy_DMA_Descriptor_SetYloopSrcIncrement(this->rxDma_Descriptor_1, 0);
if (&dummy == rxBuffer)
Cy_DMA_Descriptor_SetYloopDstIncrement(this->rxDma_Descriptor_1, 0);
else
Cy_DMA_Descriptor_SetYloopDstIncrement(this->rxDma_Descriptor_1, 256);
Cy_DMA_Descriptor_SetYloopDataCount(this->rxDma_Descriptor_1, 2);
/*Set up TX Descriptor 1*/
if (&dummy == txBuffer)
Cy_DMA_Descriptor_SetXloopSrcIncrement(this->txDma_Descriptor_1, 0);
else
Cy_DMA_Descriptor_SetXloopSrcIncrement(this->txDma_Descriptor_1, 1);
Cy_DMA_Descriptor_SetXloopDstIncrement(this->txDma_Descriptor_1, 0);
Cy_DMA_Descriptor_SetXloopDataCount(this->txDma_Descriptor_1, 256);
if (&dummy == txBuffer)
Cy_DMA_Descriptor_SetYloopSrcIncrement(this->txDma_Descriptor_1, 0);
else
Cy_DMA_Descriptor_SetYloopSrcIncrement(this->txDma_Descriptor_1, 256);
Cy_DMA_Descriptor_SetYloopDstIncrement(this->txDma_Descriptor_1, 0);
Cy_DMA_Descriptor_SetYloopDataCount(this->txDma_Descriptor_1, 2);
/*Enable DMA_channels*/
Cy_DMA_Channel_Enable(this->rxDma_base, this->rxDma_channel);
Cy_DMA_Channel_Enable(this->txDma_base, this->txDma_channel);
}
The idea is to send from, or receive to, the same byte over and over instead of filling an array that no one will ever look at, and I do that by setting the increment to 0. Of course, the transmit dest. is
Cy_DMA_Descriptor_SetDstAddress(this->txDma_Descriptor_1, (void *) &this->base->TX_FIFO_WR);
and the receive src. is
Cy_DMA_Descriptor_SetSrcAddress(this->rxDma_Descriptor_1, (void *) &this->base->RX_FIFO_RD);
so those don't increment.
It almost, kinda, sorta, works, but not quite. If I'm reading, say, 4 blocks, I'll get 3 OK, and then time out waiting (as much as 4 seconds) for the completion interrupt for the 4th. Logically, it seems like it should be the same. Maybe there is a timing issue? Or, have I messed up some mundane detail, as usual?
Show LessHello,
Easy repeatable with Creator, difficult to describe. Due to minor customer code addition, I can not upload workspace to community.
CY8CPROTO-063-BLE was used for this exercise. CYBLE-416045-02 is the intended production module.
The bootloading mechanism is a simplified implementation of the CE220960 "Upgradable Stack" example project with some customization. AN221111 "Creating a Secure System" did not provide insight.
The flash memory structure is made up of:
-App0 - Launcher application (Validates and launches App1, validates and copies decrypted App1 from flash storage, updates metadata)
-App1 - Running application firmware (Downloads, decrypts and validates new App1 firmware to Flash Storage, updates metadata and resets into App0)
-Flash Storage - Holds decrypted firmware image to be copied by App0
Customer started with CE222802 "Encrypted Bootloader" example to implement a layer of security, and studied it thoroughly. He is using the encyption keys provided in this example.
Successfully able to generate an encrypted .cyacd2 image, send it to App1, get it decrypted, stored and validated, then let App0 overwrite App1 with new image.
App0 is a Secure Image CySAF with the RSA encrypted SHA-256 signature.
This is the step that allows the code to go off in the weeds. UART messaging was added.
After adding the necessary .cy_app_header, .cy_toc_part2, cy_si_keystorage.c/h, etc code sections to Launcher app, debugging to the attached cm0+ target appears to go off into the weeds with no messaging through UART.
In the "main_cm0p.c" .cy_app_header CY_SECTION below is commented out, App0 runs fine when debugging to the attached cm0+ target and UART messaging show success.
/* Cypress Standard Application Format Header */
CY_SECTION(".cy_app_header") __USED
const cy_stc_user_appheader_t applicationHeader =
{
.objSize = CY_BOOTLOAD_APP0_VERIFY_LENGTH, /* Application Size (Bytes) excluding hash */
//.appId = CY_SI_APP_VERSION, /* App ID */
// Need APP_ID_SECUREIMG section in .appId???
.appId = (CY_SI_APP_VERSION | CY_SI_APP_ID_SECUREIMG),
.appAttributes = 0UL, /* Reserved */
.numCores = 2UL, /* CM0+ and CM4 */
.core0Vt = (uint32_t)(&__Vectors[0]) - APP0_START_ADDRESS - offsetof(cy_stc_user_appheader_t, core0Vt), /* Offset to CM0+ Vector Table in flash */
//.core1Vt = (uint32_t)(&__cy_app_core1_start_addr) - APP0_START_ADDRESS - offsetof(cy_stc_user_appheader_t, core1Vt), /* Offset to CM4 Vector Table in flash */
.core1Vt = (uint32_t) APP0_CORE1_START_ADDRESS - APP0_START_ADDRESS - offsetof(cy_stc_user_appheader_t, core1Vt), /* Offset to CM4 Vector Table in flash */
.core0Id = CY_ARM_CM0P_CPUID, /* ARM CM0+ CPU ID */
.core1Id = CY_ARM_CM4_CPUID, /* ARM CM4 CPU ID */
};
Is there an addressing issue to make the code go off in the weeds? Why does it work when the section is commented?
Thanks,
Scott
Show Lessoperating system: WINDOWS 10
IDE: PSoC creator 4.2
MCU: CYBLE-416045-02
I am trying to program the CYBLE-416045-02 proramming will fail during erasing of flash. this is the details of the error code....
"There was an error running the Programmer to configure the device. Try lowering the clock speed used for communication in the Options dialog, under Tools > Options > Program/Debug > Port Configuration. If the problem persists, make sure that the Programmer for this debug target is properly installed and ready to use."
output window
Programming device 'PSoC 63 CYBLE-416045-02 (CM4)' with file 'C:\Users\w-wow\BioCheck\BioCheck_OTA\Application.cydsn\CortexM4\ARM_GCC_541\Debug\Application.hex'.
Device ID Check
Erasing of Main Flash...
Erasing of Main Flash Failed
EraseAll API returned: Error code 0x7491A400: Unknown SROM status code
Error: dbg.M0023: There was an error while programming the device: PSoC Programmer reported error (100 - EraseAll API returned: Error code 0x7491A400: Unknown SROM status code)
I have tried to slow the clock speed as suggested in the details above but programming still fails at flash erase.
I have programmed these MCU's before using the same setttings.
I recently installed the PSoC creator 4.3 IDE but could not get the ide to program the MCU so I switched back to using PSoC creator 4.2. PSoC creator 4.3 is still installed but is not being used.
Show LessI'm looking at this:
__STATIC_INLINE void Cy_RTC_SyncFromRtc(void)
{
uint32_t interruptState;
interruptState = Cy_SysLib_EnterCriticalSection();
/* RTC Write is possible only in the condition that CY_RTC_BUSY bit = 0
* or RTC Write bit is not set.
*/
if ((CY_RTC_BUSY != Cy_RTC_GetSyncStatus()) && (!_FLD2BOOL(BACKUP_RTC_RW_WRITE, BACKUP_RTC_RW)))
{
/* Setting RTC Read bit */
BACKUP_RTC_RW = BACKUP_RTC_RW_READ_Msk;
/* Delay to guarantee RTC data reading */
Cy_SysLib_DelayUs(CY_RTC_DELAY_WHILE_READING_US);
/* Clearing RTC Read bit */
BACKUP_RTC_RW = 0U;
}
Cy_SysLib_ExitCriticalSection(interruptState);
}
in Generated_Source\PSoC6\pdl\drivers\peripheral\rtc\cy_rtc.h. I'm guessing that Cy_SysLib_EnterCriticalSection() disables interrupts and returns the previous value. If so, is it really necessary for this function to disable interrupts the whole time? It really messes with my application. Could I make my own version of this routine that wouldn't block interrupts for so long? (I don't really understand exactly how this routine works.)
Show LessI want to store some configuration in the sflash and lock the debug port using the efuse. I have read that if the debug port is locked, writing to the sflash is no longer possible.
In my use case, some of that config stored in the sflash might need to change. Is there a way to lock the debug port (SWD) and still be able to write to the sflash ? Is there a way to lock only parts of the sflash?
Thanks
Show LessI have a question on this discussion: Re: Do DMA triggers work on trigger level change or just on trigger level itself?
3. Re: Do DMA triggers work on trigger level change or just on trigger level itself?
BragadeeshV_41 Nov 15, 2019 10:14 AM (in response to user_1669321) Hi user_1669321,
It is recommended to set Trigger deactivation and re triggering to Retrigger after 4 Clk_Slow cycles when using SCB peripheral.
I see this "Note that the DMA has a trigger deactivation setting. For the SCB this should be set to 16." in PSoC 6 MCU with BLE: CY8C63x6, CY8C63x7 Architecture TRM, Document No. 002-18176 Rev. *H, page 248, section 25.3.4 SPI Buffer Modes; 25.3.4.1 FIFO Mode. Are those statements saying the same thing (and the difference is slow clocks vs clocks)? Because I do see "Retrigger after 16 Clk_Slow cycles" as one of the options:
Show Less
Hi there,
I would like to know if is there anything different in the usage of the BootloaderUtils.dll for the use with PSoC 6 devices. We are trying to provide the users of our product (which has a PSoC6) to do the DFU (Device Firmware Update) through our software (Visual Studio C# based), which already works pretty good with PSoC 4 and 5 devices, updating through UART and USB HID.
Now I am trying to use this same code with PSoC6 devices through UART interface.
But then when our software calls the BootloaderUtils.dll in the function Bootloader_Utils.CyBtldr_Program, the Visual Studio, it throws the following exception:
System.AccessViolationException: 'Attempted to read or write protected memory. This is often an indication that other memory is corrupt
It works perfectly to update when I use the Bootloader Host Tool from PSoC Creator 4.2 or 4.3.
I tried to use the cybootloaderutils.dll files provided in the installation of these PSoC Creator bin files, but it throws the same error.
Am I missing something?
Show LessI have a customer working with the CYBLE-416045-EVAL stick and has upgraded the programmer to KitProg3 in order to work within his Keil uVision environment. There is an error he is seeing, is it something we know about and can address? Here is his statement:
We almost succeeded to use Keil with the kitprog, hooray! The problem remains is this error: RDDI-DAP Error. Any ideas?
Thank you!
Please let us know.
Show LessHi guys,
I've been seeing some strange behavior on a few of my boards. The DAPLINK drive will suddenly just stop showing up. I've tried hitting SW3 for 3 seconds, unplugging, replugging, re-flashing the kp3 firmware. I just cannot get the DAPLINK drive to show up anymore with either of my two kits.
Any ideas how to troubleshoot or remedy this?
-Nick
Show Less