PSoC 6 MCU

Hi all,

We have a CY8CKIT-064S0S2-4343W kit that we're trying to get up and running with the demonstration code that is generated from AWS. I'm following the getting started guide located here https://docs.aws.amazon.com/freertos/latest/userguide/getting_started_cypress_psoc64.html and have successfully done everything up to the point of getting working code.

I've managed to build and flash the provided demo application, and the board successfully boots but then halts shortly after with "ERROR: stack overflow" — the attached screenshot shows what is happening. This happened with no WiFi credentials set, I then tried to set WiFi credentials and the error still happened. 

Any help in resolving this issue would be appreciated!

Hi:

   Why the device nane , the defined symbols field of C/C++ compiler can't change synchronously When I change the  devices from CY8C624ABZI-D44 to  CY8C624AAZI-S2D44? It will lead to a Mistake to inclde the header file of cy8c624abzi_d44.h!!!

Hello, 

I am very new to the world of BTLE, but have a large background in electrochemistry. I am currently curious about trying to power the PSOC6 purely off electrochemical reactions (glucose and glucose oxidase). I wold like to measure the potetnial over a resitior, or charge pump, or anyhting that would minimize power, and simply send that raw value via bluetooth in the lowest energy consuming form possible. I apologies if this is to vauge. If there is a simpler solution then the PSOC6 (from what i hear this is a very complex chip) i am all ears! 

thanks,

David Probst 

In PSoC 6 MCU with BLE: CY8C63x6, CY8C63x7 Architecture TRM, Document No. 002-18176 Rev. *H, section 25.6 SCB Interrupts, it says: "Note: To avoid being triggered by events from previous transactions, whenever the firmware enables an interrupt mask register bit, it should clear the interrupt request register in advance." I'm not sure what they are referring by "interrupt request register ." Would that be INTR_M?

In my mainline code, I have 

/* Unmasking only the spi done interrupt bit */
this->spi->base->INTR_M_MASK = SCB_INTR_M_SPI_DONE_Msk;

and in my ISR, 

	/* Mask the spi done interrupt bit */
	this->base->INTR_M_MASK &= ~SCB_INTR_M_SPI_DONE_Msk;

Is the Architecture TRM saying that before I unmask the SPI Done bit in INTR_M_MASK I should clear INTR_M? 

From PSoC 6 MCU: CY8C61x6, CY8C61x7 Registers TRM, Document Number: 002-23456 Rev. *C 1255, it looks like the SPI_DONE bit is RW1C. Should I do something like

	 /* Unmasking only the spi done interrupt bit */
    this->spi->base->INTR_M = SCB_INTR_M_SPI_DONE_Msk; // Clear request register; RW1C    
	this->spi->base->INTR_M_MASK = SCB_INTR_M_SPI_DONE_Msk;        

That doesn't seem quite right, because I'm only clearing one bit, but the TRM says I should "clear the interrupt request register." 

Hello,

I want to know the CPU current of the PSoC61 series, but the datasheet only has information about dual-core device (why?).

Please tell me the CPU current specifications for single-core products.

Regards,

Shimamura

Hello

Questions related to this thread.

https://community.cypress.com/t5/PSoC-6-MCU/The-contents-of-the-HEX-file-are-different/m-p/266218#M9358

Customer using CYBLE-416045-02.
Files built using PSoC Creator vary in size depending on the PC on which they are created.

(Version4.3)

As a verification, I built a sample program of "BLE_Alert_Notification" and compared customers HEX, but the size was different.
When I checked it with software that compares HEX files, I found data that existed in only one of them.

What is the cause of this?

Best Regards

Hayato

https://www.cypress.com/products/psoc-6-microcontrollers-32-bit-arm-cortex-m4m0

No devices appear on PSoC 64 product selector.