PSoC™ 6 Forum Discussions
Hello.
I am using CY8C624A (PSoC 62 - 2 MiB Flash). According to cyip_gpio_v2.h file as part of PSoC 6 PDL at Github there are some CFG_SIO register with offset 0x50 to the base address of GPIO port configuration. But it is not documented in Register TRM. The last described register of PRT0 is GPIO_PRT0_CFG_OUT at 0x4031004C and next one is first register of PRT1 at 0x40310080. There are no description for register at 0x40310050. Why is this register ommited in Register TRM? What is it used for?
Thank you.
Show LessHello,
I have a PSoC 6 Wi-Fi BT Prototyping Kit, fresh out of the box. I'm unable to program using all the latest ModusToolbox and Cypress Programming software.
When trying to program through ModusToolbox (in both modes), it autodetects this device:
***************************************
** Silicon: 0xE453, Family: 0x102, Rev.: 0x12 (A1)
** Detected Device: CY8C624ABZI-S2D44
** Detected Main Flash size, kb: 2048
** Flash Boot version: 3.1.0.378
** Chip Protection: UNKNOWN
***************************************
This seems odd, I was expecting a different Device based on other Community posts, but at least it connects. Next it fails to erase:
Info : Flash write discontinued at 0x10001848, next section at 0x10002000
Info : Padding image section 0 at 0x10001848 with 440 bytes (bank write end alignment)
[ 53%] [################ ] [ Erasing ]Error: timeout waiting for algorithm, a target reset is recommended
Error: SROM API execution failed. Status: 0x080008B4
Error: failed erasing sectors 0 to 12
** Program operation failed **
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
Info : SWD DPIDR 0x6ba02477
shutdown command invoked
Other posts recommend trying the Cypress Programmer. When I try to connect with the latest Cypress Programmer (3.0.0 build 463 with openocd 3.0.0.665, cybridge version 2.3.1.610, KitProg3 FW: 1.21.707), I get a Boost C++ library exception, in either mode (even running as Admin):
Info : [CyBridge] Start API initialization
Info : [CyBridge] Hardware initialization complete (666 ms)
Error: [CyBridge] CyBridge: Failed to open device - boost::interprocess_exception::library_error
Info : Disconnected - KitProg3 CMSIS-DAP BULK-05190A1C02179400
Error: [CyBridge] CyBridge: Failed to open device - boost::interprocess_exception::library_error
Info : Disconnected - KitProg3 CMSIS-DAP HID-05190A1C02179400
Error: [CyBridge] CyBridge: Failed to open device - boost::interprocess_exception::library_error
Advice on how to proceed?
Thanks,
Peter
Show LessHi all.
I'm currently working on designing a bootloader to be loaded during manufacturing and once it's in the user's hands, the actual firmware is downloaded from our servers. Now, I'd like to permanently disable the SWD interface after the manufacturing firmware has been loaded to prevent it being dumped. I'm new to the PSoc series and I'd like to know what options I have? Can this all be done in code, or do I need a dedicated SWD programmer from PSoc to achieve this?
Thanks
Show LessDear sir,
I want to get some examples which BLE device acts as central and master devcie about PSoC6.3 Ble5.0. when ble device acts as central and master devcie, I want to know how BLE APIs are called. Can you help me?
Show LessHello all,
I just received my PSoC 6 BLE Pioneer Kit , and have been going through the example projects.
in the EINK_CapSense project i can see that the cypress logo is being generated
with this code :
/* Cypress logo image */
cy_eink_image_t const logo[CY_EINK_IMAGE_SIZE]=
{
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 1
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 2
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, // 3
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, ....
my question is :
1. how can i generate my own custom image (what software do i need ??)
2. what is this image format ??
Thanks lampel
Show LessAt the moment if I want to create a suitable byte array for an image to be displayed on the eInk display, I first need to convert my 264px x 176px bitmap into a "variable array" using the manufacturer's PDI Apps utility program.
This works fine for hardcoding but now I want to create an application which includes some QR code generator code (you can find various libraries on github etc.) whereby I can create a compatible eInk image at runtime. The idea for the example app is to allow someone to send a text string via Bluetooth and for a QR code to be generated and displayed on the eInk display.
The problem now is that it is not obvious how the PDI App converts the bitmap. The methodology appears to have changed compared to the old eInk displays.
So, does anyone have a conversion library that will do this or does anyone have some tips on how to do it?
I have reviewed Appendix B of the example "CE218133 - PSoC 6 MCU E-INK Display with CapSense" document but none the wiser.
Thanks
G//
.
Show LessHi,
I have a project in which I ground a fabric over a compressible overlay to detect any object. Following capsense design guidelines, should the fabric overlay be grounded to the VSSD with the star configuration as described in the guidelines pdf, or should it be grounded to supply ground plane? More precisely, on the image below, should it be connected to yellow or pink circle? (If any guidelines for this method is even possible, since it is a very uncommon design)
I plan on connecting the fabric through screws which would secure the connection through the P1 connector here on my pcb draft.
P.S. This is meant to be used as a CSX touchpad widget.
Show LessHello,
you recently released updated document PSoC 6 MCU: CY8C6xx8, CY8C6xxA Architecture Technical Reference Manual (TRM) Document No. 002-24529 Rev. *F
the newly released document has confused navigation which is important for me. Look at screenshot. Menu has 3 root items. INFIN PMI points to first page describing merge of Cypress and Infineon but it is quite useless for me and in previous revision it was not presented in this table of contents while the page itself existed in document. Second group 002-01310_ contains some chapters irelevant to PSoC. Menu items links to nonexisting headings, so this navigation does not work at all. It looks like someone inserted table of contents from completly different document. And lastly the most usefull part of menu is grouped as "Insert from: 002-24529.pdf" so I must everytime expand it manually.
Could someone from Cypress regenerate this document with correct menu? For me it is very important because I use that menu a lot. I am now using older revision E until menu become fixed.
Show LessWhy when I try to connect with Cy_BLE_GAPC_ConnectDevice() it returns CY_BLE_ERROR_INVALID_PARAMETER ? The parameters are correct, double checked. More specific, the Cy_BLE_GAPC_InitConnection() which is called from Cy_BLE_GAPC_ConnectDevice() return the error.
Show LessHi, I could not find recommendations for copper weight with capsense. Is anything other than 1oz good?
I was thinking I could use 0.5 oz, which enables the factory I am targeting to produce 4mil trace width, which according to the capsense design guideline is a good thing
*there is no minimum width at all? wouldn't there be too much current for the trace width at one point?
Thanks!
Show Less