PSoC™ 6 Forum Discussions

Hello,

I'm using CY8CPROTO-062-4343W. I looked at the ADC_basic example that reads two channels asynchronously (one single ended and one diff).

I would like to incorporate a reading of the internal Temperature Sensor as a third channel.

The example uses HAL drivers found here: Hardware Abstraction Layer (HAL)

but, I can't find how to configure a channel to read from the internal temperature sensor.

Is there a way to do it using the same HAL library? or an example that reads the temperature sensor?

Thanks!

Hello,

I'm not sure about analog, so please let me know as following:

It outputs a 2MHz sine wave and receives it with a sensor. The signal received by the sensor is amplified and phase-compared with the original sine wave. Is it possible to configure this amplification and phase comparison with the analog circuit in PSoC4, 5 or 6?

When handling with 2MHz signals, where in the datasheet of PSoC do you determine if an amplifier or comparator is available?

Thanks,

Kenshow

Hi.guys

our project works fine when downloaded with SWD to our PCBA.

We added DFU SDK with UART interface, our application stops at I2C's

There is a posted discussion with similar issue:

Re: PSoC 6 I2C Stops Working When DFU SDK Included

Can you provide a code snipet how this issue was addressed.

I did send the same question to Dheeraj and Ganesh

Thanks
Ben

Hi,

we are developing an application with the CY8C6247BZI-D54 and I couldn’t find a clear answer for the following, or I found contradictory information:

1. Can we reset ONLY 1 core and keep the other one operating in normal power mode? If yes, which core is possible to reset alone, CM0+ or CM4?

2. Assuming it is possible to reset only 1 core, is it possible to “freeze” the GPIOs (or at least a few GPIOs) such that they keep the state while that core is reset?

Thank you

Hello,

I wanted to use the Smart IO feature on PORT 9  of PSoC 6. But I am using only three pins of it and configured it in Smart IO Configurator.

Can I used the remaining pins of PORT 9 as normal GPIO pins ?

Best Regards,

Vivek

Hi,
I believe it is not mentioned as a sensitive part of the design, but just to make sure, I wanted to know if it could be problematic to cross i2c or spi lines with the CIntX ground line in a capsense design (I would guess it is okay, since even crossing with capsense sensor traces is mentioned to be okay)

Thanks!

In ce218136_eink_capsense_rtos example,

an error appears in capsense_switchpowermodecallback for a mode that is not in the parameters

of the cy_stc_syspm_callback_params_t struct.

How do I solve this problem?

IDE : Psoc Creator 4.4

F/W Date : Recently Ver ( https://www.cypress.com/documentation/development-kitsboards/psoc-6-ble-pioneer-kit-cy8ckit-062-ble  )

I have fairly large mbed project (mbed-os 6.5) and I am adding power savings using the CY8CPROTO_062_4343W kit.

According to the spec, SerialBase objects lock deepsleep. However, by calling ::enable_input(false) and ::enable_output(false), the comments indicate that deep sleep is unblocked, as SerialBase unlocks it. It also deinits the serial API.

Here is the problem in a simple example:

#include "mbed.h"

UnbufferedSerial pc(USBTX, USBRX);

int

main()

{

    printf("Serial enabled, disabling.\n");

    pc.sync();

    pc.enable_input(false);

    pc.enable_output(false);

    pc.enable_input(true);

    pc.enable_output(true);

    printf("Serial enabled, this should be visible.\n");

}