I am new to the cypress ecosystem and trying to program our latest prototype board with a CY8C6116BZI-F54 MCU.Environment:
MacBook Pro - Early 2017
...
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I am new to the cypress ecosystem and trying to program our latest prototype board with a CY8C6116BZI-F54 MCU.
Environment:
- MacBook Pro - Early 2017
- Eclipse IDE for ModusToolbox
- v2.3.0 - Eclipse Build 2307
- Cypress Programmer 4.0.0
- OpenOCD v4.2.0.1430
- cybridge v3.2.1003
- KitProg3 FW version 2.21.1005
- Using Cypress MiniProg4
Debug Run configuration:
-s "${openocd_path}/../scripts"
-s "./TARGET_Yeti_6G/COMPONENT_BSP_DESIGN_MODUS/GeneratedSource"
-c "source [find interface/kitprog3.cfg]"
-c "set ENABLE_CM0 0"
-c "puts stderr {Started by GNU MCU Eclipse}"
-c "source [find target/psoc6.cfg]"
-c "kitprog3 power_config on 3300"
-c "psoc6.cpu.cm4 configure -rtos auto -rtos-wipe-on-reset-halt 1"
-c "psoc6 sflash_restrictions 1"
-c "init; reset init"
-c "kitprog3 power_control on"
It seems like sometimes the program will take because one LED on our board will come on as is programmed, my latest code is supposed to get an RGB LED to work and is so far not working. I'm trying to debug, but it seems the debugger repeatedly hits a RESET. I don't think it's the firmware leading to a reset, I think it's the programming interface. Here is what I see when I try to run the above debug configuration:
Open On-Chip Debugger 0.10.0+dev-4.2.0.1430 (2021-03-05-16:23)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "swd". To override use 'transport select <transport>'.
adapter speed: 2000 kHz
adapter srst delay: 25
adapter srst pulse_width: 25
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
cortex_m reset_config sysresetreq
Warn : SFlash programming allowed for regions: USER, TOC, KEY
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.21.1005
Info : KitProg3: Pipelined transfers enabled
Info : kitprog3: powering up target device using KitProg3 (VTarg = 3300 mV)
Info : VTarget = 3.298 V
Info : kitprog3: acquiring the device (mode: reset)...
Info : clock speed 2000 kHz
Info : SWD DPIDR 0x6ba02477
Info : psoc6.cpu.cm4: hardware has 6 breakpoints, 4 watchpoints
***************************************
** Silicon: 0xE212, Family: 0x100, Rev.: 0x23 (B2)
** Detected Device: CY8C6116BZI-F54
** Detected Main Flash size, kb: 512
** Flash Boot version: 1.20.1.42
** Chip Protection: NORMAL
***************************************
Info : starting gdb server for psoc6.cpu.cm4 on 3333
Info : Listening on port 3333 for gdb connections
Info : SWD DPIDR 0x6ba02477
psoc6.cpu.cm4 halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x00000f00 msp: 0x08047800
Info : kitprog3: powering up target device using KitProg3 (VTarg = 3300 mV)
Info : Listening on port 6666 for tcl connections
Started by GNU MCU Eclipse
Started by GNU MCU Eclipse
Info : Listening on port 4444 for telnet connections
Info : accepting 'gdb' connection on tcp/3333
Warn : Prefer GDB command "target extended-remote 3333" instead of "target remote 3333"
semihosting is enabled
Info : Auto-detected RTOS: FreeRTOS
Info : Auto-detected RTOS: FreeRTOS
Info : All data matches, Flash programming skipped
Info : SWD DPIDR 0x6ba02477
Info : SWD DPIDR 0x6ba02477
Error executing event reset-deassert-post on target psoc6.cpu.cm4:
/Applications/ModusToolbox/tools_2.3/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg:108: Error:
in procedure 'ocd_process_reset'
in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 279
in procedure 'mxs40_reset_deassert_post' called at file "/Applications/ModusToolbox/tools_2.3/openocd/bin/../scripts/target/mxs40/psoc6_common.cfg", line 166
at file "/Applications/ModusToolbox/tools_2.3/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg", line 108
Info : SWD DPIDR 0x6ba02477
Polling target psoc6.cpu.cm4 failed, trying to reexamine
Info : SWD DPIDR 0x6ba02477
Examination failed, GDB will be halted. Polling again in 100ms
Info : SWD DPIDR 0x6ba02477
Polling target psoc6.cpu.cm4 failed, trying to reexamine
Info : SWD DPIDR 0x6ba02477
Examination failed, GDB will be halted. Polling again in 300ms
Warn : target was in unknown state when halt was requested
Info : SWD DPIDR 0x6ba02477
Info : SWD DPIDR 0x6ba02477
Info : psoc6.cpu.cm4: external reset detected
Info : SWD DPIDR 0x6ba02477
Polling target psoc6.cpu.cm4 failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 300ms
Info : SWD DPIDR 0x6ba02477
Info : SWD DPIDR 0x6ba02477
Polling target psoc6.cpu.cm4 failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 300ms
Info : SWD DPIDR 0x6ba02477
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x100002d0
Info : SWD DPIDR 0x6ba02477
Error: Failed to write memory at 0xe000200c
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x08003bd0
Error: Could not read FreeRTOS thread count from target
Warn : target psoc6.cpu.cm4 is not halted (gdb fileio)
Info : SWD DPIDR 0x6ba02477
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x08003bd0
Error: Could not read FreeRTOS thread count from target
Polling target psoc6.cpu.cm4 failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 700ms
Info : SWD DPIDR 0x6ba02477
Info : SWD DPIDR 0x6ba02477
Error: Failed to write memory at 0xe000200c
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x100002d0
Info : SWD DPIDR 0x6ba02477
Error: Failed to read memory at 0x10005c48
===== arm v7m registers
(0) r0 (/32)
(1) r1 (/32)
(2) r2 (/32)
(3) r3 (/32)
(4) r4 (/32)
(5) r5 (/32)
(6) r6 (/32)
(7) r7 (/32)
(8) r8 (/32)
(9) r9 (/32)
(10) r10 (/32)
(11) r11 (/32)
(12) r12 (/32)
(13) sp (/32)
(14) lr (/32)
(15) pc (/32)
(16) xPSR (/32)
(17) msp (/32)
(18) psp (/32)
(20) primask (/1)
(21) basepri (/8)
(22) faultmask (/1)
(23) control (/2)
(24) d0 (/64)
(25) d1 (/64)
(26) d2 (/64)
(27) d3 (/64)
(28) d4 (/64)
(29) d5 (/64)
(30) d6 (/64)
(31) d7 (/64)
(32) d8 (/64)
(33) d9 (/64)
(34) d10 (/64)
(35) d11 (/64)
(36) d12 (/64)
(37) d13 (/64)
(38) d14 (/64)
(39) d15 (/64)
(40) fpscr (/32)
===== Cortex-M DWT registers
Info : SWD DPIDR 0x6ba02477
Error: Failed to write memory at 0xe000200c
Warn : target not halted
Info : target psoc6.cpu.cm4 was not halted when resume was requested
Info : SWD DPIDR 0x6ba02477
Polling target psoc6.cpu.cm4 failed, trying to reexamine
Examination failed, GDB will be halted. Polling again in 700ms
Info : SWD DPIDR 0x6ba02477
Warn : target psoc6.cpu.cm4 is not halted (gdb fileio)
Info : SWD DPIDR 0x6ba02477
Info : SWD DPIDR 0x6ba02477
Polling target psoc6.cpu.cm4 failed, trying to reexamine
Error: Failed to read memory at 0x08003bd0
Error: Could not read FreeRTOS thread count from target
Examination failed, GDB will be halted. Polling again in 1500ms
...
The following lines catch my eye the most:
Error executing event reset-deassert-post on target psoc6.cpu.cm4
/Applications/ModusToolbox/tools_2.3/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg:108: Error:
in procedure 'ocd_process_reset'
in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 279
in procedure 'mxs40_reset_deassert_post' called at file "/Applications/ModusToolbox/tools_2.3/openocd/bin/../scripts/target/mxs40/psoc6_common.cfg", line 166
at file "/Applications/ModusToolbox/tools_2.3/openocd/bin/../scripts/target/mxs40/mxs40_common.cfg", line 108
- Does anyone know what "reset-deassert-post" is attempting to do and any potential reasons it may fail?
Then there are a few similar lines with something like:
Error: Failed to write memory at 0xe000200c
- I'm not sure yet if this error needs further investigation until I know what "reset-deassert-post" is attempting to do. Perhaps if the "reset-deassert-post" errors are fixed, these subsequent errors will be resolved.
Thanks in advance for any help 🙏🏼.
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Aug 23, 2021
Solved
