PSoC™ 6 Forum Discussions
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Hello Team Cypress,
I am looking for the Cypress BLE RFSoC part, best suited for replacing Nordic's RFSoC, nRF52840 (Nordic Semiconductor Infocenter)
Required specification:
-Processor: Arm® Cortex®-M4 (equivalent or better)
-flash : 1MB flash
If you can recommend Cypress BLE SoC that suits the spec above, please share me the part number.
Thank you for your help and support.
-Ben
P.S.
The following is project information that the chip will be working along with.
Project: Smart Helmet for construction area
Features:
-The target RFSoC chip will work along with GPS, BLE + UWB so that it would locate the user's location.
-User detection ( whether the user put on the helmet )
-health tracking(body temperature, heart sensor, etc)
-Mass Production date: CY2022 Q1,
-Mass Production quantity: 100k set / year
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Dear Sir ~
As in the attached file, I can't find any sample codes in this page.
For example,,,
If I want to initialize SPI master function in this kit, how can I start ?! (I don't have base code to develop!!)
Thank you so much.
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Hi Team,
We are designing a board using the MCU CY8C6137BZI-F14
1 x UART = SCB7, TX - P1[1], RX - P1[0]
2 x I2C = SCB5, SCL - P5[0], SDA - P5[1]
SCB8, SCL - P6[0], SDA - P6[1]
16 x GPIO
3 x Analog Read = P10[1], P10[4], P10[5]
1 x Analog Write = P10[0]
SWD is the debugging interface. -
SWDIO - P6[6]
SWCLK - P6[7]
XRES
SWO - P6[4]
32KHz RTC OScillator - P0[0], P0[1]
High-speed oscillator - P12[6], P12[7]
1). I hope the pin mapping is correct
2). I believe the ECO and the WCO pins are correct and their load capacitors.
The crystal for WCO used is - CM9V-T1A-32.768KHZ-12.5PF-20PPM-TA-QC its load capacitance is 12.5pF.
The crystal used for ECO is - LFXTAL063075BULK, load capacitance - 22pF
3). The VBACKUP pin is supplied from the same source that powers the VDDD pin.
4). We are not using a USB, so the pin VDDUSB has connected to the same power supply that powers the VDDD pin.
5). Only a 1uF decoupling capacitor is used at the VREF pin
6). Only a 10uF decoupling capacitor is placed at the VRF pin.
7). Could you please suggest to e a programmer and the development kit for the select MCU.
I hope this will suffice. DEV KIT - PSoC® 6 WiFi-BT Pioneer Kit (CY8CKIT-062-WiFi-BT) (cypress.com)
Programmer - CY8CKIT-005 MiniProg4 Program and Debug Kit (cypress.com)
The schematic is attached herewith.
Please let me know if there are any mistakes.
Hi Team,
We are designing a board using the MCU CY8C6137BZI-F14
1 x UART = SCB7, TX - P1[1], RX - P1[0]
2 x I2C = SCB5, SCL - P5[0], SDA - P5[1]
SCB8, SCL - P6[0], SDA - P6[1]
16 x GPIO
3 x Analog Read = P10[1], P10[4], P10[5]
1 x Analog Write = P10[0]
SWD is the debugging interface. -
SWDIO - P6[6]
SWCLK - P6[7]
XRES
SWO - P6[4]
32KHz RTC OScillator - P0[0], P0[1]
High-speed oscillator - P12[6], P12[7]
1). I hope the pin mapping is correct
2). I believe the ECO and the WCO pins are correct and their load capacitors.
The crystal for WCO used is - CM9V-T1A-32.768KHZ-12.5PF-20PPM-TA-QC its load capacitance is 12.5pF.
The crystal used for ECO is - LFXTAL063075BULK, load capacitance - 22pF
3). The VBACKUP pin is supplied from the same source that powers the VDDD pin.
4). We are not using a USB, so the pin VDDUSB has connected to the same power supply that powers the VDDD pin.
5). Only a 1uF decoupling capacitor is used at the VREF pin
6). Only a 10uF decoupling capacitor is placed at the VRF pin.
7). Could you please suggest to e a programmer and the development kit for the select MCU.
I hope this will suffice. DEV KIT - PSoC® 6 WiFi-BT Pioneer Kit (CY8CKIT-062-WiFi-BT) (cypress.com)
Programmer - CY8CKIT-005 MiniProg4 Program and Debug Kit (cypress.com)
The schematic is attached herewith.
Please let me know if there are any mistakes.
After doing a PSoC 6 build that should only occupy 0x1000.0000 to 0x1004.0000 an examination of the memory shows it has written an extra row (0x200) of data past the end.
I see nothing in the MAP file to explain the extra row of data. Nor anything in the .ld file
Looking at the hex files it shows in the x_signed.hex file. Shows the extra row of data. It appears as 462 bytes of 'random-like' data followed by 50 bytes of zero.
Is there any chance this is just a quirk of cymcuelftool.exe? The tool is version: cymcuelftool 1.0.0.62
Here is the command line from the build output and it's output (cleaned up to be easier to read).
"cymcuelftool.exe"
--sign CortexM4\ARM_GCC_541\Debug\x.elf
--output CortexM4\ARM_GCC_541\Debug\x_signed.elf
--hex CortexM4\ARM_GCC_541\Debug\x_signed.hex
SUCCESS: calculated CRC-32C over ELF section .cy_boot_metadata and stored
No ELF section .cychecksum found, creating one
Application checksum calculated and stored in ELF section .cychecksum
Checksum calculated and stored in ELF section .cymeta
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How I can use the interrupt service routine in PSOC 6 "CYBLE-416045-02"?
I used to use ISR_StartEx() instruction when I Set up the interrupt to function in PSOC 5, but I PSOC 6 I cannot find how to do that?
Thanks in Advance
Show LessDear Receiver,
There is an IoT device and it will be designed to connect to AWS (Amazon Web Service).
Under this condition, do I need to select a MCU (PSoC_6, CYS0644xx) with Amazon FreeRTOS support ?!
I feel a little confused about...
If I select a MCU (PSoC_6, CYB0644xx) with only FreeRTOS support, dose this mean this IOT device can't connect to AWS ?!
Thank you so much.
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Hello.
Is there any sample code or application note that realizes Secure Boot and DFU at the same time?
I would like to know how to realize two functions at the same time, not individually.
Best Regards.
Yutaka Matsubara
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