Use of P6[6] and P6[7] for SWD on CY8CKIT-062-BLE Pioneer Board

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TeMa_1467596
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I'm trying to build a project that uses the CY8CKIT-062-BLE Pioneer Board with external connections to the headers for ADC, SPI, and UART.  I need 8+ single-ended ADCs and have been advised to set up a the single ADC with a 2 configurations:

Config 0 has 4 inputs and Config 1 has 8 inputs and these are spread across pins on P7 and P10 but when I try to generate the application it errors saying that the use of P6[6] and P6[7] for SWD are preventing all sorts of SPI pins from being usable so...

Q1 What do I need as far as SWD settings on my Debug Select drop down in the System tab?  I want to be able to write and debug code and I could use either the KitProg2 that's built in or a Miniprog 3 plugged into a JTAG header.

Notwithstanding Q1 above, I set the Debug Select option under the System tab to 'GPIO' but it still failed to generate the application with the error message...

Net(s) "\ADC:muxoutPlus\" span multiple amuxbus segments. This may cause analog routing to fail.

and

In order to implement the connectivity specified by these nets, it is necessary to join multiple segments of the amuxbus together. This usually occurs because pins have been locked to locations which are far from their destination. While this usage is valid, it constrains routing for other nets and can lead to routing failures in congested designs. If you experience a routing failure, consider unlocking pins or moving them to a location which is closer to their destination. See the TRM and the Analog Device Editor diagram for more details.

Q2 The analog pins I've selected clearly are not OK but are there rules to what I can do?  Do all the pins for ADC need to be on the same port for each Configuration?

Thanks in advance.

Ted

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1 Solution

Ted,

I tried the attached project, and it failed to find a solution for analog routing even though unlock all the pins.

That means the routing exceeds the capacity of system resources. Maybe you need reduce the number of components/pins used in your project.

View solution in original post

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4 Replies
TeMa_1467596
Level 5
Level 5
5 sign-ins 5 likes given First like received

I'm not sure what the issue is but I tried starting a new project and based it on the CE220186_RTC_CTS example for the CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit (the eval board I'm using) and then I added the ADC set to 2 configurations with 4 inputs per Config, gave it 8 ADC pins and let it decide where to assign the pins, it builds successfully.

It chose P10[3,4,5,6] fo rthe first Config and P10[0,1,2] + P9[3] for the second Config.

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Ted,

Possible to attach your project mentioned in post#1?

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lock attach
Attachments are accessible only for community members.

Hi Fwan, here is the original project archived

I'm using...

PSoC Creator  4.2 (4.2.0.641)

Culture: English (United States)

OS Version: Microsoft Windows NT 10.0.15063.0

CLR Version: 4.0.30319.42000

Installed CyInstaller Products:

CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit 1.0 Rev.*D

CySmart 1.3

Peripheral Driver Library 3.0.1

PSoC Programmer 3.27.1

PSoC Creator 4.2

Loaded Plugins:

Name: Customizer Loader

Version: 4.2.0.641

Company: Cypress Semiconductor

Description: Loads component customizers.

Name: Addin Discovery

Version: 4.2.0.641

Company: Cypress Semiconductor

Description: Discovers PSoC Creator addins (kits, language packs, etc)

Name: Device Catalog

Version: 4.2.0.641

Company: Cypress Semiconductor

Description: Device Catalog Plugin

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Ted,

I tried the attached project, and it failed to find a solution for analog routing even though unlock all the pins.

That means the routing exceeds the capacity of system resources. Maybe you need reduce the number of components/pins used in your project.

0 Likes