Supercap Backup Power on CY8CKIT-062-WiFi-BT for RTC retention

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ElTr_4809176
Employee
Employee
Welcome!

I have been trying to get the RTC on the CY8CKIT-062-WiFi-BT to retain time over power cycles, though with no success this far.

I have found suggested solutions in these discussions which I tried to reproduce:

Battery/Super Capacitor backup power / RTC

VBackup and Super Cap for RTC to work

though still had no success in getting it to work. Some of the proposed solutions refer to settings in PSoC Creator. I'm, however, using ModusToolbox. This means I had to try to recreate the (assumed) behavior of these solutions using the SysPm PDL.

Starting from the RTC Basics example in MTB, here is what I tried:

1. Comment out

           Cy_RTC_SetDateAndTime(&defaultTime);           
           _cyhal_rtc_set_century(_CYHAL_RTC_INIT_CENTURY);

in cyhal_rtc_init() to prevent the clock from being reset after a power cycle

2. Charge SuperCap using Cy_SysPm_BackupSuperCapCharge(CY_SYSPM_SC_CHARGE_ENABLE); (and pre-charged using a 100 Ohm resistor). Supercap reads 1.6V.

3. It is suggested to change the vBackupSource to dedicated supply in the accepted answer to the first discussion. I'm not sure how to achieve the same thing using SysPm. Cy_SysPm_BackupSetSupply(CY_SYSPM_VDDBACKUP_VBACKUP); seems like the best candidate for this?

4. Explicitly enable PMIC as suggested for PSoC Creator in one of the discussions:

     Cy_SysPm_PmicUnlock();   
     Cy_SysPm_PmicEnable();
     Cy_SysPm_PmicEnableOutput();
     Cy_SysPm_PmicLock();

(This should be the default configuration anyway and does not change anything about the observed behaviour)

5. Set SW7 to SuperCap position

The board power seems to glitch immediately as soon as I set SW7 to the supercap position. I can only fix it by setting SW7 back to the KitProg position.

I assume this is because the PMIC circuitry is supposed the disable Vddd on power loss but somehow shorts it to VBackup instead?

The board is Rev.10, if that makes a difference.
EDIT: Hardware Revision is actually Rev.04, not 10.

Nachricht geändert durch Elias Trommer

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1 Solution

I have the CY8CKIT-062-BLE and have found the supercap RTC support to be hardly useable. It works OK if I primarily leave the board powered on, and holds the clock if I briefly power it off. But, if it has been powered off for a few days, it will go into a boot loop if SW7 is in the supercap position and I try to power it on. Sometimes I can boot the board with SW7 in the VDDD/KITPROG2 and then switch it to supercap. Other times, switching 7 to the supercap position resets the board even after it is powered up. I assumed this was because the supercap was so discharged that it was pulling down the PSoC 6's power. But if yours is pre-charged, I can't explain that.

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6 Replies
StNu_1610991
Level 4
Level 4
First comment on KBA 50 sign-ins 25 replies posted

I also struggled with that until I found that the CY8CKIT-062-BLE board has a 0-ohm resistor (R29) which shorts VBACKUP to P6_VDD.  You have to remove this resistor to use a super-cap or backup battery.

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Thank you for pointing that out. I've checked, and from what I can tell, the voltage from the capacitor does not get applied to the P6_VDD rail on my hardware. Also, the supercap does not seem to be draining particularly quickly, suggesting that the power side is most likely fine.

I originally misstated the board model that I have too. It's a Cy8CKIT-062-WiFi-BT. Sorry for the confusion, I've already spent quite a few hours trying to sort this out. I have edited my post accordingly.

Going through the schematic, I also couldn't finde any obvious place where V_BACKUP might get shorted into P6_VDD.

https://www.cypress.com/file/420846/download

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Maybe some more context on the perceived glitches:

I am trying to display some text and graphics on the CY8CKIT028-TFT display. With SW7 in VDDD position, the code works fine. With SW7 in Supercap position, I only get a very faded and corrupted image, even with the board connected via USB.

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Sorry, my comments applied only to the CY8CKIT-062-BLE board not the Cy8CKIT-062-WiFi-BT.

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Another interesting behavior that I'm observing is that the RTC also seems to reset when triggering an XRES through SW1.

From my understanding, this should not be the case as long as a sufficiently large voltage is available on V_BACKUP.

Table 18-5 in the reference manual states that the backup domain should remain on during an XRES assertion.

Steps to reproduce:

1. Set SW7 to SuperCap position (with supercap charged, confirmed via voltage reading across C19/C25: 1.6V)

2. Flash RTC basics example (with no alterations)

3. Set time via UART

4. Trigger XRES by pushing SW1

Expected behavior: Set time is retained
Observed behavior: Time restarts from Sat Jan 1 2000

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I have the CY8CKIT-062-BLE and have found the supercap RTC support to be hardly useable. It works OK if I primarily leave the board powered on, and holds the clock if I briefly power it off. But, if it has been powered off for a few days, it will go into a boot loop if SW7 is in the supercap position and I try to power it on. Sometimes I can boot the board with SW7 in the VDDD/KITPROG2 and then switch it to supercap. Other times, switching 7 to the supercap position resets the board even after it is powered up. I assumed this was because the supercap was so discharged that it was pulling down the PSoC 6's power. But if yours is pre-charged, I can't explain that.

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