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PSoC 6 MCU

TeMa_1467596
Contributor II

I've manged to get the code in CE220823 running in my  project on the m0p core (see this thread Re: SMIF on PSoC6 CY8CKIT-062-BLE ) but I'm confused about the addressing range.

I've previously worked with the S25FL512 flash memory device on the CY8KIT-062-BLE board (that CE220823 communicates to via SMIF); it is a 64 MByte device organized into 512 Byte pages that can be written all at once).  The device contains 131,072 x 256 kByte Sectors which each contain 512 pages.  There are some simple limitations to how to use the device, you can write pages into a sector but you can only erase a sector so you have to work around this limitation.  One thing to note is that, after an erase, all bytes are 0xFF or all '1's and programming makes some bits into '0's so you can write to the same page twice as long as you mask an area previously written to with 0xFF's, the data previously written won't be affected.

If anyone knows that the above is wrong, please say so and I'll edit it.

However, this post is a question about how the SMIF interface - in MMIO mode (aka 'Command' aka 'normal') maps the extMemAddress to the address map of the S25FL512.

The extMemAddress is a 3 byte address so it's 24 bits and 2^24 is only 16 Meg.  Is the 24 bit address referring to bits 23-0 or bits 25-2 or something else.  If you see my diagram below, I've presented this as an A or B choice but maybe it's neither?  Questions that arise are:

1.     If it's bits 23-0 (option A) then are we limited to only 16 Meg of space (only a quarter of the available)?

2.     If it's bits 25-2 (option B) then how do you get down to the last 4 byte level?

3.     Is extMemAddress[0] the most significant or the least?

This article External Quad-Flash Erase and Write on CY8CKIT-062-BLE through PSoC® 6 SMIF – KBA224071 talks about this but says that "extMemAddress[0] is the A23:A16 bits of the address" which indicates my option A  but then goes on to say this...

Since the current sector is erased before each ‘write’ time, A17:A16 of extMemAddress[0] is ignored for each sector erase command. Each time the extMemAddress[0]++ 64-kB data is skipped, the current sector does not change within four successive increments. It moves to the next sector only when the fourth increment completes; that is, it keeps erasing data written in the previous 3 writes. Only the fourth write is retained as the next erase moves to the next sector.

Which leaves me VERY confused.

SMIFmemQ.PNG

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ShipingW_81
Moderator
Moderator

Option A should be correct.

In CE220823, memory address extMemAddress contains 3 bytes. It can access only 16MB memory space, which is only a quarter of  S25FL512. Actually, there is a "Bank Address" provided for extending the high bits of address (above A23) for all 3-byte address commands. Please refer to "Bank Address Register" of part datasheet from visiting: S25FL512​ 

On the other hand, external memory can also be accessed by 4-byte address.

These devices may also be configured to take a 4-byte address from the host system with the traditional 3-byte address commands. The 4-byte address mode for traditional commands is activated by setting the External Address (EXTADD) bit in the bank address register to 1. In project, you need set deviceCfg_S25FL512S_0 .numOfAddrBytes as 0x04u in file cy_smif_memconfig.c

Let me know if you have any issue over the document you mentioned External Quad-Flash Erase and Write on CY8CKIT-062-BLE through PSoC® 6 SMIF – KBA224071? The paragraph you listed above just tells how to erase correctly before each memory write, because at least one sector is erased each time, and its space is not equal to the one of write action(extMemAddress[0]++).

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4 Replies
ShipingW_81
Moderator
Moderator

Option A should be correct.

In CE220823, memory address extMemAddress contains 3 bytes. It can access only 16MB memory space, which is only a quarter of  S25FL512. Actually, there is a "Bank Address" provided for extending the high bits of address (above A23) for all 3-byte address commands. Please refer to "Bank Address Register" of part datasheet from visiting: S25FL512​ 

On the other hand, external memory can also be accessed by 4-byte address.

These devices may also be configured to take a 4-byte address from the host system with the traditional 3-byte address commands. The 4-byte address mode for traditional commands is activated by setting the External Address (EXTADD) bit in the bank address register to 1. In project, you need set deviceCfg_S25FL512S_0 .numOfAddrBytes as 0x04u in file cy_smif_memconfig.c

Let me know if you have any issue over the document you mentioned External Quad-Flash Erase and Write on CY8CKIT-062-BLE through PSoC® 6 SMIF – KBA224071? The paragraph you listed above just tells how to erase correctly before each memory write, because at least one sector is erased each time, and its space is not equal to the one of write action(extMemAddress[0]++).

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MeenakshiR_71
Employee

Just to add to Fred's post, the 3-byte address access is faster and useful when you read more often and read from a limited range at a given time. 4-byte address lets you access the whole address space at any instant by using the 4-byte address directly.

So depending on your requirement, you can choose appropriately.

extMemAddress has to be sent in big-indian format i.e. MSB should be sent out first ==> element 0 of the extMemAddress, which is sent out first, is the MSB of the 24 or 32-bit address.

Regards,

Meenakshi Sundaram R

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TeMa_1467596
Contributor II

Meenakshi, Fred, thanks for the answers, it seems like 4-byte addressing would solve my need to access the entire 64 MBytes. However, I thought that the cy_smif_memconfig.c file was generated by the SMIF Memory Configuration tool so, if I alter the contents of cy_smif_memconfig.c as suggested by Fred, wont that be messed up by the next compilation?

I'm travelling in the UK right now for a week (visiting family including Grand Daughter ) so have limited opportunity to set this up and test it; any chance that the CE220823 project be tweaked to include the 4 byte addressing as an option?

Ted

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TeMa_1467596
Contributor II

I'm now trying to make this work either by:

A. Using 4 byte address mode (preferred)

B. Using 3 byte address mode and then setting up the bank address

I've been working on A but have found that it isn't actually using the 4th extra address byte, here's what I did so far...

Changed line 185 in cy_smif_memconfig.c to set .numOfAddrBytes as 0x04u  to provide 4 byte addressing

Changed line 82 in smif_mem.h to define ADDRESS_SIZE (4u)

Then in my code I defined the extMemAddress to 4 bytes as follows

    uint8_t extMemAddress[ADDRESS_SIZE] = {0x00, 0x00, 0x00, 0x00};

And then compiled and ran my code (which is borrowing code and files heavily from CE220823) which includes this line...

ReadMemory(SMIF_1_HW, &SMIF_1_context, rxBuffer, 16, extMemAddress);

Which calls a function in smif_mem.c which also prints out the bytes that are read in 0x00 format to my serial port

Now my S25FL512S has some data in it starting at address 0x00000000 which is as follows...

0xB5 0x00 0xAF 0x00 0x22 0x01 0x21 0x07 0x48 0x00 0xF0 0x11 0xF8 0x0A 0x20 0x00 0xF0 0x16 0xF8 0x01

So I tried to read that starting at address 0x00000004 by changing my address to...

uint8_t extMemAddress[ADDRESS_SIZE] = {0x00, 0x00, 0x00, 0x04};

But I got exactly the same line of bytes returned which puzzled me so I tried...

uint8_t extMemAddress[ADDRESS_SIZE] = {0x04, 0x00, 0x00, 0x00};

and then I got all 0xFF returned so I was obviously reading from elsewhere in memory.  Eventually I tried...

uint8_t extMemAddress[ADDRESS_SIZE] = {0x00, 0x00, 0x04, 0x00};

and then I got...

0x22 0x01 0x21 0x07 0x48 0x00 0xF0 0x11 0xF8 0x0A 0x20 0x00 0xF0 0x16 0xF8 0x01

which was what I was looking for - so clearly the 4th byte is simply not being used as part of the address (and I proved that the address format is where extMemAddress[0] is the MS Byte

but I still haven't solved my problem.  Looking at the SMIF configuration tool it shows a block that says...

Number of address bytes for SMIF transactions which is set to 0x03 and I don't seem to be able to change that to 0x04 so maybe it's the SMIF interface that's limiting me to 3 byte addresses?

The S25FL512S datasheet says that, by default, it expects 3 bytes addresses and has to be put into Extended Address Mode to accept 4 byte addresses (Section 7.1.1) but I can't see how to do this and maybe I need to change SMIF and set the S25FL512S into extended address mode?

Any ideas on how to make 4 byte addressing work (preferred) or how to set the base address so that I can use 3 byte addressing and pre-select which one of 4 banks I want to operate on?

0xB5 0x00 0xAF 0x00 0x22 0x01 0x21 0x07 0x48 0x00 0xF0 0x11 0xF8 0x0A 0x20 0x0

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