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PSoC 6 MCU

New Contributor II

Hi all,

chips from other vendors have the ability to set secure bit which disables debug interface, therefore, internal flash memory cannot be read out. On such chip can be performed chip erase which clears the secure bit and internal flash. We like this solution and would like to have it with PSoC6.

On PSoC6, we found the only oneway transition from not locked to fully lock state. Has PSoC6 only this oneway lock?

Regards

Ondrej

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Employee

For security reasons, the PSoC 6 can not revert to the original NORMAL state once the device has been put into the SECURE state.  This means that if you have selected to close all debug ports, you can never revert to debug ports being open. This is so that there is no way a hacker can access the device and to source code or sensitive information. If firmware needs to be updated in the field, a bootloader needs to be implemented.

Mark

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Employee

For security reasons, the PSoC 6 can not revert to the original NORMAL state once the device has been put into the SECURE state.  This means that if you have selected to close all debug ports, you can never revert to debug ports being open. This is so that there is no way a hacker can access the device and to source code or sensitive information. If firmware needs to be updated in the field, a bootloader needs to be implemented.

Mark

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