PSoC6 Minimum external components

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Rolf_Nooteboom
Level 5
Level 5
10 sign-ins 5 solutions authored First solution authored

Hello,

I just did a nice design with PSoC6! I figured out it would really be small. However, it turns out about the same footprint is necessary for all the external components.

I'm used to have some external components with PSoC3/4/5, no problem. But this time I need at least 25 external capacitors and a fairly large inductor, eating up the same footprint size of the PSoC 6 itself! This is a huge drawback, especially as it's advertised as wearable solution. Also PSoC is know to reduce the BOM.

It's hard to imagine that 2 VDD pins at 0.5mm distance needs 4 additional capacitors! Wat about using resonance free (polymer?) capacitors?

F38 Series | AVX

https://product.tdk.com/info/en/catalog/datasheets/emc_esr_yna15_en.pdf

It would really, and I mean REALLY be helpful if you guys at Cypress could provide (component count vs performance) optimized guidelines and (layout) examples. It would be very helpful if the following topics would be covered:

  • design examples for several configurations (for example: reduced component digital only, high performance analog, buck/non-buck, BLE/non-BLE, etc)
  • capacitor requirements
  • use of the buck regulator to power external circuits
  • EMI/EFT considerations for PSoC 6

Thanks!

Rolf

1 Solution
srnu_276571
Level 5
Level 5
25 replies posted 10 replies posted 5 replies posted

Hello Rolf,

We are glad that you already have completed a design with PSoC 6. I am hoping all is going well with the bring up and the testing.

As you correctly noted, PSoC devices are designed to increase integration and reduce external BoM. Note that PSoC 6 (as compared to PSoC 3 and 5) has multiple power rails and power input pins. This does not necessarily translate into a high number of external components. Have you been able to take a look at our Hardware Design Guidelines for PSoC 6 here: PSoC 6 BLE Hardware Design Considerations_Full_Draft ?

The CY8CKIT-062-BLE kit implements all recommended parameter values and layout techniques to get the best possible performance from the device. In the kit, we recommend using a 2.2 uH, 1.2 A, and 0806 (2 mm x 1.6 mm) package. Are you using a similar inductor? Also, as you mentioned, you could use the resonance free/polymer capacitors; but please note that this might have a cost implication as well.

If you could share your schematic, and also your system requirements, we could help optimize your design. If you are not comfortable sharing the schematic on a public forum, please do send me an email or create a technical support case and ask it to be routed to PSoC 6 applications.

We will definitely consider your feedback in improving the hardware design guidelines application note.

Cheers,

Srinivas

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2 Replies
srnu_276571
Level 5
Level 5
25 replies posted 10 replies posted 5 replies posted

Hello Rolf,

We are glad that you already have completed a design with PSoC 6. I am hoping all is going well with the bring up and the testing.

As you correctly noted, PSoC devices are designed to increase integration and reduce external BoM. Note that PSoC 6 (as compared to PSoC 3 and 5) has multiple power rails and power input pins. This does not necessarily translate into a high number of external components. Have you been able to take a look at our Hardware Design Guidelines for PSoC 6 here: PSoC 6 BLE Hardware Design Considerations_Full_Draft ?

The CY8CKIT-062-BLE kit implements all recommended parameter values and layout techniques to get the best possible performance from the device. In the kit, we recommend using a 2.2 uH, 1.2 A, and 0806 (2 mm x 1.6 mm) package. Are you using a similar inductor? Also, as you mentioned, you could use the resonance free/polymer capacitors; but please note that this might have a cost implication as well.

If you could share your schematic, and also your system requirements, we could help optimize your design. If you are not comfortable sharing the schematic on a public forum, please do send me an email or create a technical support case and ask it to be routed to PSoC 6 applications.

We will definitely consider your feedback in improving the hardware design guidelines application note.

Cheers,

Srinivas

Hi Srinivas,

Thanks for your feedback.

Yes, I followed the Hardware Design Guidelines for PSoC 6 as stated in the pdf and also took reference of the CY8CKIT-062-BLE kit as well as the recommended Murata coil.

I'm able to share my design, I'll mail it to you directly.

Cheers,

Rolf

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