PSoC 6 PMIC Control deep sleep best practise

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ThLe_297461
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Level 2
Welcome! 5 replies posted First question asked

Hello Community, Hello Cypress Masters,

I am working on a PSoC 6 Project which implements the CYBLE-41604-02 Module ( for faster development )

Programming environment is the PSoC Creator 4.3

The PCB design is the following....:

Pushbutton connected to P0_4 ( wakeup pin ), reaction is confirmed in an ISR test.

2 x 3v3 LDO regulators.. REG1 ( 100mAh lipo, to 3v3 to VBACKUP via diode, ENA tied to itself to be always on )

REG2 ( 2000 mAh lipo, to 3v3 to VDDD System, ENA pin tied to P0_5 PMIC control pin )

My test aproach was to enable the PMIC pin in the System / Operating Conditions and set the VBACKUP to dedicated powersupply.

The test so far resulted in fail.

CM0 is starting CM4, in CM4 i have my LED Blink routine based on the Button ISR example (CE219521) if i go to sleep it disables the PMIC pin and shuts down. If i push the button it doesnt wakeup again and also the REG2 stays disabled. If i disable the PMIC pin and manually set P0_5 to HIGH in initial it runs. so it enters sleep and wakes up again fine. but the REG2 keeps running.

I want to shut down the VDDD Domain for sleep. only keeping vbackup running for later RTC usage and wakeup.

Does someone have a working example for making the corect power staging ?

I was looking through the Cy_sysPm PDL but i wasnt successfull.

I dont find anything in the example pages 😞

Many greetings

Thomas

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1 Solution
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psoc schematic.PNG

I am using the CY8CPROTO-63 Board. I feed 3v3 to VBACKUP always on power.

The changes i made on PCB are visible in schematic.

-removed R29

-added R38 / R39 for I2C

-added all parts for PSOC Regulator

-added R45 10K Pullup

-added R44 0 ohm to connect P0_5 to EN of regulator

I use CE219521 as a base.

PSOC 6 MCU GPIO Interrupt

Tests so far are Okay.

I putted the PMIC enable inside the ISR.

If i run the ISR on cm0 the PMIC doesnt come up again. but Status information is kept.

If i run the ISR on cm4 the System wakes and sleeps as supposed. BUT. looses all status information.

This is the ISR in both cases

void Isr_switch(void)

{

    /* Clears the triggered pin interrupt */

    Cy_GPIO_ClearInterrupt(KIT_BTN1_PORT, KIT_BTN1_NUM);

    NVIC_ClearPendingIRQ(SysInt_Switch_cfg.intrSrc);

    Cy_SysPm_PmicUnlock();

    Cy_SysPm_PmicEnableOutput();

    Cy_SysPm_PmicLock();

    /* Set interrupt flag */

    interrupt_flag = true;

}

Attached are the Project exports.

Archive 01 contains the cm0 ISR part. PMIC stays off after disabling

Archive 02 contains the cm4 ISR version. Works as expected. CM4 handles button ISR and handles PMIC. No Value retention unfortunately.

Archive 03 contains an updated cm0 ISR version. I found out that if i add the DisableCm4 at the if( pmic enabled ) right before disabling pmic and re enabling the cm4 it switches correctly. also basically killing and rebooting the cm4 which might be usefull in some cases.

void Isr_switch(void)

{

    /* Clears the triggered pin interrupt */

    Cy_GPIO_ClearInterrupt(KIT_BTN1_PORT, KIT_BTN1_NUM);

    NVIC_ClearPendingIRQ(SysInt_Switch_cfg.intrSrc);

    Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR);   // restart CM4

    Cy_SysPm_PmicUnlock();

    Cy_SysPm_PmicEnableOutput();

    Cy_SysPm_PmicLock();

           

    /* Set interrupt flag */

    interrupt_flag = true;

}

          // in MAIN or Power management subfunction

     void switch_power_off_from_cm0()

     {

            Cy_GPIO_SetDrivemode(P0_4_PORT, P0_4_PIN, CY_GPIO_DM_PULLUP);

            Cy_GPIO_Set(P0_4_PORT, P0_4_PIN);

            Cy_GPIO_SetDrivemode(P0_5_PORT, P0_5_PIN, CY_GPIO_DM_STRONG_IN_OFF);

            Cy_GPIO_Clr(P0_5_PORT, P0_5_PIN);

            /* Configure the PMIC controller output pin to be active logic low

            *  after the PMIC is disabled */

            Cy_SysDisableCM4();

            if (Cy_SysPm_PmicIsOutputEnabled())

            {

                Cy_SysPm_PmicUnlock();

                Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW);

               

            }

     }

the perfect one would be to deepsleep the cm4 first from cm0 and then to switch off  the power.

Cy_SysCtl_SendCM4_DeepSleep(); // carefull this doesnt exist... just a mockup idea

So far Ganesh, thank You i can now sleep and wake the Unit. If You have any idea please dont hesitate.

I am running successfull Archive03 which is attached

Greetings

Thomas

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3 Replies
VenkataD_41
Moderator
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750 replies posted 500 replies posted 250 solutions authored

Hello Thomas,

Can you please attach the board schematic showing how the PMIC controller input pin P0[4] and PMIC controller output pin/PMIC_ENABLE pin P0[5]?

Also, please let us know whether the ENA pin of your regulators should be HIGH or LOW to enable.

Thanks

Ganesh

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Hi Thomas,

If you have configured the PMIC controller pins as shown in the image below, the please call the code below the image in the main.c of CM0+ or CM4.

pmic.PNG

/* Scenario: There is a need to enable the PMIC controller output.

  * Note that the output logic state of the pmic_output is ignored once

  * the Cy_SysPm_PmicEnableOutput() is called.

  */

   Cy_SysPm_PmicUnlock();

   Cy_SysPm_PmicEnableOutput();

   Cy_SysPm_PmicLock();

/* Configure the PMIC controller input pin to be active logic high after

  * the PMIC controller is disabled

  */

   Cy_GPIO_SetDrivemode(P0_4_PORT, P0_4_PIN, CY_GPIO_DM_PULLUP);

   Cy_GPIO_Set(P0_4_PORT, P0_4_PIN);

  

   /* Configure the PMIC controller output pin to be active logic low

  * after the PMIC is disabled */

   Cy_GPIO_SetDrivemode(P0_5_PORT, P0_5_PIN, CY_GPIO_DM_STRONG_IN_OFF);

   Cy_GPIO_Clr(P0_5_PORT, P0_5_PIN);

  

  

   if (Cy_SysPm_PmicIsOutputEnabled())

  {

   Cy_SysPm_PmicUnlock();

   Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW);

  }

Please try and let us know if this works.

Thanks

Ganesh

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lock attach
Attachments are accessible only for community members.

psoc schematic.PNG

I am using the CY8CPROTO-63 Board. I feed 3v3 to VBACKUP always on power.

The changes i made on PCB are visible in schematic.

-removed R29

-added R38 / R39 for I2C

-added all parts for PSOC Regulator

-added R45 10K Pullup

-added R44 0 ohm to connect P0_5 to EN of regulator

I use CE219521 as a base.

PSOC 6 MCU GPIO Interrupt

Tests so far are Okay.

I putted the PMIC enable inside the ISR.

If i run the ISR on cm0 the PMIC doesnt come up again. but Status information is kept.

If i run the ISR on cm4 the System wakes and sleeps as supposed. BUT. looses all status information.

This is the ISR in both cases

void Isr_switch(void)

{

    /* Clears the triggered pin interrupt */

    Cy_GPIO_ClearInterrupt(KIT_BTN1_PORT, KIT_BTN1_NUM);

    NVIC_ClearPendingIRQ(SysInt_Switch_cfg.intrSrc);

    Cy_SysPm_PmicUnlock();

    Cy_SysPm_PmicEnableOutput();

    Cy_SysPm_PmicLock();

    /* Set interrupt flag */

    interrupt_flag = true;

}

Attached are the Project exports.

Archive 01 contains the cm0 ISR part. PMIC stays off after disabling

Archive 02 contains the cm4 ISR version. Works as expected. CM4 handles button ISR and handles PMIC. No Value retention unfortunately.

Archive 03 contains an updated cm0 ISR version. I found out that if i add the DisableCm4 at the if( pmic enabled ) right before disabling pmic and re enabling the cm4 it switches correctly. also basically killing and rebooting the cm4 which might be usefull in some cases.

void Isr_switch(void)

{

    /* Clears the triggered pin interrupt */

    Cy_GPIO_ClearInterrupt(KIT_BTN1_PORT, KIT_BTN1_NUM);

    NVIC_ClearPendingIRQ(SysInt_Switch_cfg.intrSrc);

    Cy_SysEnableCM4(CY_CORTEX_M4_APPL_ADDR);   // restart CM4

    Cy_SysPm_PmicUnlock();

    Cy_SysPm_PmicEnableOutput();

    Cy_SysPm_PmicLock();

           

    /* Set interrupt flag */

    interrupt_flag = true;

}

          // in MAIN or Power management subfunction

     void switch_power_off_from_cm0()

     {

            Cy_GPIO_SetDrivemode(P0_4_PORT, P0_4_PIN, CY_GPIO_DM_PULLUP);

            Cy_GPIO_Set(P0_4_PORT, P0_4_PIN);

            Cy_GPIO_SetDrivemode(P0_5_PORT, P0_5_PIN, CY_GPIO_DM_STRONG_IN_OFF);

            Cy_GPIO_Clr(P0_5_PORT, P0_5_PIN);

            /* Configure the PMIC controller output pin to be active logic low

            *  after the PMIC is disabled */

            Cy_SysDisableCM4();

            if (Cy_SysPm_PmicIsOutputEnabled())

            {

                Cy_SysPm_PmicUnlock();

                Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW);

               

            }

     }

the perfect one would be to deepsleep the cm4 first from cm0 and then to switch off  the power.

Cy_SysCtl_SendCM4_DeepSleep(); // carefull this doesnt exist... just a mockup idea

So far Ganesh, thank You i can now sleep and wake the Unit. If You have any idea please dont hesitate.

I am running successfull Archive03 which is attached

Greetings

Thomas

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