I'm running into problems with a PsoC Creator Project using the CY8C6247BZI-D54 MCU.
Basically I have two I2C buses that we are using for a design using pins 3.0/3.1 and 4.0/4.1. The I2C bus works on the 3.0/3.1 pins but it doesn’t on the 4.0/4.1 pins. I've included the a screenshot for logic analyzer outputs showing the two different buses in I2C operations.
We've based our code off of the sample code for I2C operations in the PSoC6 PDL Documentation. Our code implementation is also identical for both instances of each bus and our top level design of the SCB blocks are both set up identically as well.
Any feedback to address this issue is welcome. Please let me know if any other elaboration is needed.
EDIT: clarified the pullups that we are using for both buses are 4.7K resistors with a 3.3V supply on each I2C line
We've already attempted to try reaching the Engineering Support Ticket System with Cypress and have not had much benefit out of our meetings with the random engineers arbitrarily assigned to us.
If you are using CY8CKIT-062-WiFi-BT, P3.0/P3.1 are connected to BT_UART
and P4.0 is connected to BT_DEV_WAKE_P4_0.
I wonder if you can try another pin instead of P4.0 and apply 2K~10K pull-ups to both signals?
I should have clarified a little better - I'm currently using this MCU in a custom design my coworker and I are working on. In the design, we are using 4.7K pullup resistors. I will edit the original post to reflect this.
Thank you for the clarification, then all my concerns are gone.
(But then the question remains...)