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If the 32kHz WCO crystal were to suddenly experience a deviation in frequency, how would the PSoC respond? Would any of the PDL libraries raise errors?
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Adln,
I've had experience with mechanical shocks (due to drops) on a piezo-electric device such as crystals. Maybe this discussion will be useful to you or others.
My personal experience is with a crystal driving the CPU clock. (Note: This issue was exhibited on a non-PSoC chip. However, unless HW precautions were implemented on the PSoC this will occur on it too.)
We had to perform a large amount of drop tests on a hard surface. In the testing, we exhibited many watchdog events. It was root caused to the CPU being active (non-sleep) and the crystal driving the CPU clock exhibited piezo-electric effects of the mechanical drop. These effects would cause the CPU to be 'overclocked'. When the CPU overclocked, it was HIGHLY probable to perform a read of executable code (or data) incorrectly. When the code was incorrect it was because the minimum read times clocked by the CPU clock was not met. This 'bad' opcode read would usually cause the code to execute in the wrong path like a train jumping the track and running randomly anywhere. Eventually the watchdog would stop CPU operation and reset the CPU. (Hooray for a functional watchdog!)
Your question was about the watch crystal and the WCO. I predict that a significant drop can contribute to both oscillator overclocking and underclocking. Since there is no practical means to clock the CPU off the WCO, the above root cause would only apply to the ECO if used.
Usually the WCO is used to clock the wakeups of the CPU for BLE advertisements or scans. If the overclocking and underclocking don't cancel each other, then it is possible to 'slip' in the scheduled advertisement or scan events. The slippage some be relatively minimal. Additionally, BLE has mechanisms to resync scheduled events so you might miss one or two cycles.
Len
"Engineering is an Art. The Art of Compromise."
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Adln,
I've had experience with mechanical shocks (due to drops) on a piezo-electric device such as crystals. Maybe this discussion will be useful to you or others.
My personal experience is with a crystal driving the CPU clock. (Note: This issue was exhibited on a non-PSoC chip. However, unless HW precautions were implemented on the PSoC this will occur on it too.)
We had to perform a large amount of drop tests on a hard surface. In the testing, we exhibited many watchdog events. It was root caused to the CPU being active (non-sleep) and the crystal driving the CPU clock exhibited piezo-electric effects of the mechanical drop. These effects would cause the CPU to be 'overclocked'. When the CPU overclocked, it was HIGHLY probable to perform a read of executable code (or data) incorrectly. When the code was incorrect it was because the minimum read times clocked by the CPU clock was not met. This 'bad' opcode read would usually cause the code to execute in the wrong path like a train jumping the track and running randomly anywhere. Eventually the watchdog would stop CPU operation and reset the CPU. (Hooray for a functional watchdog!)
Your question was about the watch crystal and the WCO. I predict that a significant drop can contribute to both oscillator overclocking and underclocking. Since there is no practical means to clock the CPU off the WCO, the above root cause would only apply to the ECO if used.
Usually the WCO is used to clock the wakeups of the CPU for BLE advertisements or scans. If the overclocking and underclocking don't cancel each other, then it is possible to 'slip' in the scheduled advertisement or scan events. The slippage some be relatively minimal. Additionally, BLE has mechanisms to resync scheduled events so you might miss one or two cycles.
Len
"Engineering is an Art. The Art of Compromise."