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Hi,
I use Modustoolbox and have a problem understanding the configuration of smart I / O.
The ramping LED example runs on my controller. I also understand how ramping works, differences between the PWM signals.
What I do not understand are the settings of the LUTs. LUT2 works as a divide-by-2 from the clock, ok. Function of a d-flip-flop. But where can I see in the configuration that I have set a d-flipflop like this?
I understand pure truth tables with and, or, etc., but that the LUT is not a flip-flop!
I also don't understand the table "State transition table for a divide-by-4 sequential circuit". The value of D0 is passed on with each rising edge of Clock. Where do I see this way of working.
My problem is understanding how to convert the example circuit into a configuration. I have a reasoning problem.
Can someone explain that to me a little easier?
thanks
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PSoC 6 MCU
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Yes, you are correct, the LUTs are utilized to create a sequential circuit as shown in the circuit diagram below:
For example, LUT2 should be configured to generate an output that is the complement of the input every clock cycle. To realize the above diagram, LUT2 in the Smart I/O configurator is configured as shown in the image below:
As can be seen in the above image, all the three inputs to the LUT2 is its output. Also, LUT2 is configured to generate an output which is complement of it input. The only possible inputs 111 and 000 generate output as 0 and 1 respectively.
The same is the case with LUT1 and LUT3.
Here are some additional resources that might be helpful: https://community.cypress.com/t5/ModusToolbox-Blog/Session-2-Introduction-to-Digital-Peripherals-in-...
The above session on digital peripherals in modustoolbox covers Smart I/O as well.
You can also refer to the Smart I/O configurator guide: ModusToolbox Smart I/O Configurator Guide which provides more details regarding using the SMart I/O configurator.
Best Regards
Ekta
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- Many thanks
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Hi,
I now understand the principle.
You need the circuit, the routing table and the table of the LUTs. I created the timing diagram based on the circuit and then compared it with the routing table and the LUT table.
E.g.
clock cycle 1: Qo = 0 -> Do = 1 and then Qo = 1
clock cycle 2: Qo = 1 -> Do = 0 and then Qo = 0
The changes are made with each increasing cycle.
clock cycle 1: Q0 = 0 and Q1 = 0 XNOR -> D1 = 1 and then Q1 = 1
clock cycle 2: Q0 = 1 and Q1 = 1 XNOR -> D1 = 1 and then Q1 = 1
This means Q0 has a period HI and Q1 has two periods HI of the output clock. So comes the division by 4.
A d-flip-flop is not in LUT2, only the logic. But don't forget to consider routing and the LUT table.
(https://github.com/Infineon/mtb-example-psoc6-smartio-ramping-led)
best regards
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Yes, you are correct, the LUTs are utilized to create a sequential circuit as shown in the circuit diagram below:
For example, LUT2 should be configured to generate an output that is the complement of the input every clock cycle. To realize the above diagram, LUT2 in the Smart I/O configurator is configured as shown in the image below:
As can be seen in the above image, all the three inputs to the LUT2 is its output. Also, LUT2 is configured to generate an output which is complement of it input. The only possible inputs 111 and 000 generate output as 0 and 1 respectively.
The same is the case with LUT1 and LUT3.
Here are some additional resources that might be helpful: https://community.cypress.com/t5/ModusToolbox-Blog/Session-2-Introduction-to-Digital-Peripherals-in-...
The above session on digital peripherals in modustoolbox covers Smart I/O as well.
You can also refer to the Smart I/O configurator guide: ModusToolbox Smart I/O Configurator Guide which provides more details regarding using the SMart I/O configurator.
Best Regards
Ekta
- Tags:
- Many thanks
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Many thanks