EMIF interface to FPGA

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RiTa_288331
Level 2
Level 2
10 replies posted 10 questions asked 5 replies posted

Greetings All!

I'm using a PSOC6 BLE development kit, and I want to add several ADCchannels of sigma delta converters.  The PSOC6 doesn't have enough space in its programmable logic to accommodate 4 sigma delta interface (each has a sinc3 filter, a decimator, and runs at a delta sigma sampling rate of 10 to 20MHz).

In order to account for this, I have the sigma delta converters on board a Lattice Machxo3 development board.  What I want is to make the Machxo3 look like a memory interface to the PSOC, so that I can use the EMIF interface.  In this way, the PSOC would read external memory addresses every so often, which are actually the conversion results of the 4 sigma delta converters.  I'm hoping to get a sampling rate of ~100kHz.

I don't have much experience with memory types or EMIF - is it easier to make the FPGA look like an asynchronous memory, or a synchronous memory?

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DheerajK_81
Moderator
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Moderator
First comment on KBA First comment on blog 5 questions asked

There is no parallel memory interface component in PSoC 6. We only support Serial Memory Interface (SMIF). You can find more information about this here:

If the Lattice Machxo3 SysMEM block can be modeled to look like memory interface to the PSoC, then it should work. We haven't tested with FPGAs, so I cannot guarantee anything for sure.

Regards,

Dheeraj

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DheerajK_81
Moderator
Moderator
Moderator
First comment on KBA First comment on blog 5 questions asked

There is no parallel memory interface component in PSoC 6. We only support Serial Memory Interface (SMIF). You can find more information about this here:

If the Lattice Machxo3 SysMEM block can be modeled to look like memory interface to the PSoC, then it should work. We haven't tested with FPGAs, so I cannot guarantee anything for sure.

Regards,

Dheeraj

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