Communication lines over Capsense related ground traces

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jcsb1994
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Hi,
I believe it is not mentioned as a sensitive part of the design, but just to make sure, I wanted to know if it could be problematic to cross i2c or spi lines with the CIntX ground line in a capsense design (I would guess it is okay, since even crossing with capsense sensor traces is mentioned to be okay)

pastedImage_0.png

Thanks!

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1 Solution
BragadeeshV
Moderator
Moderator
Moderator
First question asked 1000 replies posted 750 replies posted

Hi JeSi_4326976​,

Thanks for the quick update. Please find the answers to your questions inline:

1.  The I2C series resistors are a little higher, should they be as close to the pins as possible?

-> That is correct. We recommend placing them as closer to the PSoC pins as possible.

2. In this image, we see the 4 armed-star. (CintX, VSSD, VSSA, Capsense hatch from top to bottom) I guess the loop from CintX would be a little shorter if I used vias to pass under the PSoC, but it would be higher impedance than my current large trace. Would you advice a different approach?

-> You could place vias and connect that to the VSSA pin. To ensure that the impedance is low, you can keep that trace length at 20 mils to connect these two pins in the bottom layer. Our aim here is to keep the distance and hence the impedance between the Cint ground terminal and the VSS pin as low as possible.

3. Should I keep my ground plane away as an other arm of my star ground (1), or merge all the 4 arms of my star ground directly int the ground plane (2). I believe former is correct, but just want to make sure:

-> The return path to supply ground a simply be a copper pour as in option 2. Therefore it is not required to have a separate arm like in option 1.

4. Are these ground traces? If yes, please increase the width to 20 to 25 mils.

pastedImage_2.png

Regards,

Bragadeesh

Regards,
Bragadeesh

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4 Replies
BragadeeshV
Moderator
Moderator
Moderator
First question asked 1000 replies posted 750 replies posted

Hi JeSi_4326976​,

There are no issues. However, we recommend shortest path between the Cint caps ground terminal and the VSSA pin. Is it possible for you to place vias near the ground terminal and connect it to the central ground pad or the VSS pin directly? Can you share a zoomed out shot of our layout (focusing around 1 cm from the IC)?

Are you not using series resistors on the I2C lines?

Regards,

Bragadeesh

Regards,
Bragadeesh

Hi JeSi_4326976

We have our community users following certain spaces in the community so that they could answer your query faster. We would highly recommend you to create your posts in the respective spaces such as PSoC 6 MCU (instead of Community information) so that you can get faster responses.

Let us know if you are facing any difficulties.

Best regards,

Bragadeesh

Regards,
Bragadeesh

BragadeeshV_41 wrote:


We would highly recommend you to create your posts in the respective spaces such as PSoC 6 MCU (instead of Community information) so that you can get faster responses.

I didn't know this, I never changed the default place where the question would be posted! Thank you, I will make sure I do this for my following posts.

BragadeeshV_41 wrote:

However, we recommend shortest path between the Cint caps ground terminal and the VSSA pin. Is it possible for you to place vias near the ground terminal and connect it to the central ground pad or the VSS pin directly? Can you share a zoomed out shot of our layout (focusing around 1 cm from the IC)?

I actually connected the Cintx gnd pads to the central star ground, which is a little far, but I thought it was mandatory to connect CIntA and B to the star ground with their own trace. From 7.4.10 :

pastedImage_2.png

So in my design, I have a star ground individually connecting 4 things: VSSA, VSSD, the capsense hatch, and the CIntX ground pads. I am aware that capsense hatch and CintX are analog, but from what I understand it is better to separate them.

1.

The I2C series resistors are a little higher, should they be as close to the pins as possible?

pastedImage_1.png

2.

In this image, we see the 4 armed-star. (CintX, VSSD, VSSA, Capsense hatch from top to bottom) I guess the loop from CintX would be a little shorter if I used vias to pass under the PSoC, but it would be higher impedance than my current large trace. Would you advice a different approach?

Here is what it looks like with the copper planes poured.

pastedImage_2.png

3.
Should I keep my ground plane away as an other arm of my star ground (1), or merge all the 4 arms of my star ground directly int the ground plane (2). I believe former is correct, but just want to make sure:

pastedImage_3.png

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BragadeeshV
Moderator
Moderator
Moderator
First question asked 1000 replies posted 750 replies posted

Hi JeSi_4326976​,

Thanks for the quick update. Please find the answers to your questions inline:

1.  The I2C series resistors are a little higher, should they be as close to the pins as possible?

-> That is correct. We recommend placing them as closer to the PSoC pins as possible.

2. In this image, we see the 4 armed-star. (CintX, VSSD, VSSA, Capsense hatch from top to bottom) I guess the loop from CintX would be a little shorter if I used vias to pass under the PSoC, but it would be higher impedance than my current large trace. Would you advice a different approach?

-> You could place vias and connect that to the VSSA pin. To ensure that the impedance is low, you can keep that trace length at 20 mils to connect these two pins in the bottom layer. Our aim here is to keep the distance and hence the impedance between the Cint ground terminal and the VSS pin as low as possible.

3. Should I keep my ground plane away as an other arm of my star ground (1), or merge all the 4 arms of my star ground directly int the ground plane (2). I believe former is correct, but just want to make sure:

-> The return path to supply ground a simply be a copper pour as in option 2. Therefore it is not required to have a separate arm like in option 1.

4. Are these ground traces? If yes, please increase the width to 20 to 25 mils.

pastedImage_2.png

Regards,

Bragadeesh

Regards,
Bragadeesh