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Hi,
i would like to know which (and how much) analog peripherials (Opamps,Comps, Filter, Dacs,...) are planned for PSoC6.
Also i am interested if there are plans for integration of a non timer based high speed / high resolution PWM module with a resolution <1ns.
Thanks in advance.
Solved! Go to Solution.
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Hi,
The following are the analog peripherals currently planned/made available in PSoC 6 family of devices.
- two continuous time op-amps
- two low power comparators
- one 12-bit 2-Msps SAR ADC
- one 12-bit VDAC
Please take a look at the brochure as well. PSoC 6 MCU Brochure.pdf
As for your question on PWM, PSoC 6 currently integrates 32-bit multi-mode TCPWM blocks. Please let us know about your PWM requirements (frequency and duty cycle range), and we will let you know if resolution < 1 ns is possible.
Cheers.
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Hi,
The following are the analog peripherals currently planned/made available in PSoC 6 family of devices.
- two continuous time op-amps
- two low power comparators
- one 12-bit 2-Msps SAR ADC
- one 12-bit VDAC
Please take a look at the brochure as well. PSoC 6 MCU Brochure.pdf
As for your question on PWM, PSoC 6 currently integrates 32-bit multi-mode TCPWM blocks. Please let us know about your PWM requirements (frequency and duty cycle range), and we will let you know if resolution < 1 ns is possible.
Cheers.
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Hi,
first thanks for your fast reply. The PWM requirements regarding frequency und duty cycle range are:
- frequency > 2 MHz
- Duty Cycle (minimum range 0..50% better 0..90%)
- PWM resolution >=8 bit (best 9..10 bit)
For your interest, target application is digital\mixed signal control of switch mode power supplies and other power electronics converters. Therefore the pwm frequency should be 1 bit greater than adc resolution to avoid limit cycle oscillation.
Thanks
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I understand your requirement. The maximum clock available in the PSoC 6 device currently is 150 MHz. For a PWM frequency of 1 MHz, the PWM resolution that can be achieved is 7.2 bits. For a PWM frequency of 2 MHz, it would be 6.2 bits.
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Are there any plans for an high resolution pwm module as programmable digital block in the PSoC6? Some other vendors of Cortex M4 architectures provide this. This would be very interesting for switch mode power supply designers.
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Hi b.ulrich_1845111. Please note that PSoC 6 is portfolio of devices. We are currently defining other members of the family. We will definitely take your feedback into account.
Cheers.
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Hi!
As I know, Infineon has PWM <1ns. Very interesting, how they achieve that.
For the PSoC6, I was hoping, that it would have MORE analog capability than PSoC 5LP, which I am using to its limits. Unfortunately, it seems, that Cypress leaves the field of uniqueness to a certain degree. It was the fascinating analog capability, which makes me chose PSoC as "my" microcontroller. We are using it for very flexible measurement and testing purposes in the automotive control units area. For me is clear, that I do not need the PSoC6 and I have to stay with 5LP. In my current project, I'm using two DACs, two ADCs, eight comparators, two OpAmps and the SigmaDelta-ADC with plans to add two more DACs and OpAmps. The project lives from PSoC5LP. It couldn't exist without.
Cheers.
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Hello!
The devices currently planned in the PSoC 6 architecture do not have as much analog resources as the PSoC 5LP devices, but the PSoC 6 architecture has been built to be able to provide more analog, such as extra ADCs, DACs, Opamps, comparators. Also, there is an extra ADC and DAC that can be used from the CapSense block. I'm glad that the PSoC 5LP is able to meet your needs for your project! Could you share what you are working on that is requiring so much analog? Whatever information you can provide would be much appreciated and could help us with our next generation PSoC's!
Thanks for the comments!
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Hello!
Thanks for your interest!
We're using the 5LP for test and measurement applications for automotive
control units in the laboratory and in HIL-testers. Rapid prototyping and
very high flexibility are needed in this field as we cannot develop a new
hardware for every new feature. For the current usage, we have four input
pairs for triggering on signals and measuring duty cycle and frequency on
four pwm-controlled motor-lines (logical difference). Add ons are for
controlling a power supply via CAN or triggering an oscilloscope, and for
measuring the voltages when pwm is off. Next step will be to implement the
waveform DACs for driving predefined powersupply curves.
I know about the method to combine elements for having an ADC and so on.
But I started to hate this approach while using the PSoC4, since this
costs valuable routing ressources. For our purpose, we'd like to have more
routing flexibility and maybe more analog elements. At least an input
buffer per ADC. It's a waste of ressources to spend an OpAmp as a buffer
on that place.
As we need eight comparators, we also use the special features of the
SIO-pins. More processing power is not needed. Yet. Could be a future
scenario to put MATLAB Simulink models into the PSoC for having an
emulation platform, maybe for motors.
Cheers.
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Are there any plans to include in PSoC6 more than 2 opamps?
Some applications may require a third opamp or else a third opamp can extend capabilities of PSoC6.
Best Regards,
Yiannis
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