A question about PDL usage with a Bootloader

[efor]

Hello All,

I am currently working on a dual application project that uses a different top design. I haven't been able to find any documentation that states how the logic/UDB/mesh/GPIO works when switching from one app to another. I have searched through the psoc 63 TRM and the 3.1.2 pdl documentation and came up unsuccessful. My questions are:

How does the reprogramming of UDB and logic work when using a dual application project? Does it initialize the mesh when app0 starts and then that UDB and GPIO configurations is locked for app 1? Or is each component re-routed when app1 in flash is started?

Thanks!

[LinglingG_46 · Accepted solution]

How does the reprogramming of UDB and logic work when using a dual application project?
It is the same as a general project, the code will have a "CySoftwareReset();" when it run into the App0 or App1.
void Cy_DFU_ExecuteApp(uint32_t appId)
{
CY_ASSERT(appId < CY_DFU_MAX_APPS);
cy_dfu_appId = (uint8_t)appId;
CySoftwareReset();
}

Does it initialize the mesh when app0 starts and then that UDB and GPIO configurations is locked for app 1?
Now it will have a reset.

Or is each component re-routed when app1 in flash is started?
Yes, it will have a re-routed.