SAR6_cGetSample hangs the uP

        Hi All,

I'm trying to read from a SAR6 ADC and not getting much joy. I've got the SAR6 input from a PGA, and the PGA clocked at 32kHz.

The PGA and SAR6 are started and set to high power mode. The PGA gain set to 1.

Then a call to SAR6_cGetSample seems to hang at;

mov reg[ASY_CR], ASY_CR_SYNCEN

From what I can gather, this waits for a rising edge on PHI1.

Is it possible that the clock PHI1 isn't running?

Any clues appreciated.

James.

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